drm/amdgpu: add mcbp driver parameter

Add mcbp driver parameter, so that mcbp feature can be
enabled/disabled by driver parameter.

Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 221f420c0a7449799956fc4db9a1a2e382307743..63bb6249e455c41d464732dcfbed5e7220e92e51 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -159,6 +159,7 @@ extern struct amdgpu_mgpu_info mgpu_info;
 extern int amdgpu_ras_enable;
 extern uint amdgpu_ras_mask;
 extern int amdgpu_async_gfx_ring;
+extern int amdgpu_mcbp;
 
 #ifdef CONFIG_DRM_AMDGPU_SI
 extern int amdgpu_si_support;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index b2a9de32c61fa65fa603a1ec16ce692f86ea785c..f83b8aa9da78934b014cc1ea5ddfd73475bca3ef 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2575,6 +2575,9 @@ int amdgpu_device_init(struct amdgpu_device *adev,
 
        amdgpu_device_get_pcie_info(adev);
 
+       if (amdgpu_mcbp)
+               DRM_INFO("MCBP is enabled\n");
+
        /* early init functions */
        r = amdgpu_device_ip_early_init(adev);
        if (r)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index d1a0c013e27ea3a14b0b383016ecbe3e3af0aaef..fc92f7106c6d0d31f021b9f47fb871aba4fc72eb 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -137,6 +137,7 @@ uint amdgpu_smu_memory_pool_size = 0;
 /* FBC (bit 0) disabled by default*/
 uint amdgpu_dc_feature_mask = 0;
 int amdgpu_async_gfx_ring = 1;
+int amdgpu_mcbp = 0;
 
 struct amdgpu_mgpu_info mgpu_info = {
        .mutex = __MUTEX_INITIALIZER(mgpu_info.mutex),
@@ -574,6 +575,10 @@ MODULE_PARM_DESC(async_gfx_ring,
        "Asynchronous GFX rings that could be configured with either different priorities (HP3D ring and LP3D ring), or equal priorities (0 = disabled, 1 = enabled (default))");
 module_param_named(async_gfx_ring, amdgpu_async_gfx_ring, int, 0444);
 
+MODULE_PARM_DESC(mcbp,
+       "Enable Mid-command buffer preemption (0 = disabled (default), 1 = enabled)");
+module_param_named(mcbp, amdgpu_mcbp, int, 0444);
+
 #ifdef CONFIG_HSA_AMD
 /**
  * DOC: sched_policy (int)