drm/i915/cnl: Extend Wa 1178 to Aux F.

We also need to extend this WA to Aux F.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180129232223.766-3-rodrigo.vivi@intel.com

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 98b4d8357a4c001e7ffc3c5a1f2fadf3b46a1d2d..d8e283cef4483f637b4363a9aed6bb48991d8155 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8437,10 +8437,12 @@ enum skl_power_gate {
 #define _CNL_AUX_ANAOVRD1_B            0x162250
 #define _CNL_AUX_ANAOVRD1_C            0x162210
 #define _CNL_AUX_ANAOVRD1_D            0x1622D0
+#define _CNL_AUX_ANAOVRD1_F            0x162A90
 #define CNL_AUX_ANAOVRD1(pw)           _MMIO(_PICK(_CNL_AUX_REG_IDX(pw), \
                                                    _CNL_AUX_ANAOVRD1_B, \
                                                    _CNL_AUX_ANAOVRD1_C, \
-                                                   _CNL_AUX_ANAOVRD1_D))
+                                                   _CNL_AUX_ANAOVRD1_D, \
+                                                   _CNL_AUX_ANAOVRD1_F))
 #define   CNL_AUX_ANAOVRD1_ENABLE      (1<<16)
 #define   CNL_AUX_ANAOVRD1_LDO_BYPASS  (1<<23)
 

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index a274e930f04569f21650cf7ab4d4ea8f23a1dc98..294b85adc413e8ac9899dc17fd9a7df7a4108572 100644 (file)
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -395,7 +395,7 @@ static void hsw_power_well_enable(struct drm_i915_private *dev_priv,
        /* Display WA #1178: cnl */
        if (IS_CANNONLAKE(dev_priv) &&
            (id == CNL_DISP_PW_AUX_B || id == CNL_DISP_PW_AUX_C ||
-            id == CNL_DISP_PW_AUX_D)) {
+            id == CNL_DISP_PW_AUX_D || id == CNL_DISP_PW_AUX_F)) {
                val = I915_READ(CNL_AUX_ANAOVRD1(id));
                val |= CNL_AUX_ANAOVRD1_ENABLE | CNL_AUX_ANAOVRD1_LDO_BYPASS;
                I915_WRITE(CNL_AUX_ANAOVRD1(id), val);