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pinctrl: SPEAr320: Correct pad mux entries for rmii/smii
author
Deepak Sikri
<deepak.sikri@st.com>
Sat, 27 Oct 2012 09:17:48 +0000
(14:47 +0530)
committer
Linus Walleij
<linus.walleij@linaro.org>
Mon, 5 Nov 2012 11:33:41 +0000
(12:33 +0100)
pin entries of rmii and smii are interchanged by mistake. Fix it.
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/spear/pinctrl-spear320.c
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diff --git
a/drivers/pinctrl/spear/pinctrl-spear320.c
b/drivers/pinctrl/spear/pinctrl-spear320.c
index 4fccf9529541e5a6e8dd0158a5cac9186366e521..ca47b0e50780c52b884c7155349ad107fd098a93 100644
(file)
--- a/
drivers/pinctrl/spear/pinctrl-spear320.c
+++ b/
drivers/pinctrl/spear/pinctrl-spear320.c
@@
-2960,9
+2960,9
@@
static struct spear_function mii2_function = {
};
/* Pad multiplexing for cadence mii 1_2 as smii or rmii device */
-static const unsigned
s
mii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20,
+static const unsigned
r
mii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20,
21, 22, 23, 24, 25, 26, 27 };
-static const unsigned
r
mii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 };
+static const unsigned
s
mii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 };
static struct spear_muxreg mii0_1_muxreg[] = {
{
.reg = PMX_CONFIG_REG,