rtl8xxxu: Implement 8192eu device specific quirks
authorJes Sorensen <Jes.Sorensen@redhat.com>
Thu, 7 Apr 2016 18:19:30 +0000 (14:19 -0400)
committerKalle Valo <kvalo@codeaurora.org>
Thu, 14 Apr 2016 12:45:27 +0000 (15:45 +0300)
Set REG_QUEUE_CTRL and REG_ACLK_MON for 8192eu.

Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.c
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h

index ed266f081fd0de1a01f058b8365620fae9535036..3e96ba25bf91096b5304dbf72fc29476bc832c4f 100644 (file)
@@ -7197,6 +7197,20 @@ static int rtl8xxxu_init_device(struct ieee80211_hw *hw)
        if (priv->fops->init_statistics)
                priv->fops->init_statistics(priv);
 
+       if (priv->rtl_chip == RTL8192E) {
+               /*
+                * 0x4c6[3] 1: RTS BW = Data BW
+                * 0: RTS BW depends on CCA / secondary CCA result.
+                */
+               val8 = rtl8xxxu_read8(priv, REG_QUEUE_CTRL);
+               val8 &= ~BIT(3);
+               rtl8xxxu_write8(priv, REG_QUEUE_CTRL, val8);
+               /*
+                * Reset USB mode switch setting
+                */
+               rtl8xxxu_write8(priv, REG_ACLK_MON, 0x00);
+       }
+
        rtl8723a_phy_lc_calibrate(priv);
 
        priv->fops->phy_iq_calibrate(priv);
index 82cbe856694ae47b2f79ec6657532057572c8802..c19f234f1934a415fda7c0d60a9377f9dde068fe 100644 (file)
 #define REG_PKT_VO_VI_LIFE_TIME                0x04c0
 #define REG_PKT_BE_BK_LIFE_TIME                0x04c2
 #define REG_STBC_SETTING               0x04c4
+#define REG_QUEUE_CTRL                 0x04c6
 #define REG_HT_SINGLE_AMPDU_8723B      0x04c7
 #define REG_PROT_MODE_CTRL             0x04c8
 #define REG_MAX_AGGR_NUM               0x04ca