ipq806x: use new usb3 implementation
authorChristian Lamparter <chunkeey@gmail.com>
Thu, 5 Dec 2019 01:10:26 +0000 (02:10 +0100)
committerPetr Štetiar <ynezz@true.cz>
Thu, 19 Dec 2019 21:41:57 +0000 (22:41 +0100)
Use new usb3 implementation and refresh dts to the new dwc3 structure

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
[proper authorship of the patch]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
16 files changed:
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064-ap161.dts
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064-db149.dts
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064.dtsi
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8065-r7800.dts

index 381fcee5ea54b4b3c843cca80950225895f79d60..987731b04fbb53fc4acf4eae031117d75711e345 100644 (file)
                        status = "okay";
                };
 
-               phy@100f8800 {          /* USB3 port 1 HS phy */
+               usb3_0: usb3@110f8800 {
                        status = "okay";
                };
 
-               phy@100f8830 {          /* USB3 port 1 SS phy */
-                       status = "okay";
-               };
-
-               phy@110f8800 {          /* USB3 port 0 HS phy */
-                       status = "okay";
-               };
-
-               phy@110f8830 {          /* USB3 port 0 SS phy */
-                       status = "okay";
-               };
-
-               usb30@0 {
-                       status = "okay";
-               };
-
-               usb30@1 {
+               usb3_1: usb3@100f8800 {
                        status = "okay";
                };
 
index 1dad12cfd6393dc3f288c51fddde1fdaa3da351f..edfa18d73a31ad63380857a1358f3912de451415 100644 (file)
                        status = "okay";
                };
 
-               phy@100f8800 {          /* USB3 port 1 HS phy */
+               usb3_0: usb3@110f8800 {
                        status = "okay";
                };
 
-               phy@100f8830 {          /* USB3 port 1 SS phy */
-                       status = "okay";
-               };
-
-               phy@110f8800 {          /* USB3 port 0 HS phy */
-                       status = "okay";
-               };
-
-               phy@110f8830 {          /* USB3 port 0 SS phy */
-                       status = "okay";
-               };
-
-               usb30@0 {
-                       status = "okay";
-               };
-
-               usb30@1 {
+               usb3_1: usb3@100f8800 {
                        status = "okay";
                };
 
index de80a11bdfe53f8504cb7e228494f37ca1ea66a9..865e27ff7357b15d9956e1afb37d1fb85c36b353 100644 (file)
                        };
                };
 
-               phy@100f8800 {          /* USB3 port 1 HS phy */
-                       status = "okay";
-               };
-
-               phy@100f8830 {          /* USB3 port 1 SS phy */
-                       status = "okay";
-               };
-
-               phy@110f8800 {          /* USB3 port 0 HS phy */
-                       status = "okay";
-               };
-
-               phy@110f8830 {          /* USB3 port 0 SS phy */
-                       status = "okay";
-               };
-
-               usb30@0 {
+               usb3_0: usb3@110f8800 {
                        status = "okay";
 
                        pinctrl-0 = <&usb0_pwr_en_pin>;
                        pinctrl-names = "default";
                };
 
-               usb30@1 {
+               usb3_1: usb3@100f8800 {
                        status = "okay";
 
                        pinctrl-0 = <&usb1_pwr_en_pin>;
index fc7aea0dca5d7a4b01babc4b6921097a62ec1b0a..9e5ff273a4643fe749167e5f6923dc87cbd5d93c 100644 (file)
                        status = "okay";
                };
 
-               phy@100f8800 {          /* USB3 port 1 HS phy */
-                       status = "okay";
-               };
-
-               phy@100f8830 {          /* USB3 port 1 SS phy */
-                       status = "okay";
-               };
-
-               phy@110f8800 {          /* USB3 port 0 HS phy */
-                       status = "okay";
-               };
-
-               phy@110f8830 {          /* USB3 port 0 SS phy */
-                       status = "okay";
-               };
-
-               usb30@0 {
+               usb3_0: usb3@110f8800 {
                        status = "okay";
 
                        pinctrl-0 = <&usb0_pwr_en_pins>;
                        pinctrl-names = "default";
                };
 
-               usb30@1 {
+               usb3_1: usb3@100f8800 {
                        status = "okay";
 
                        pinctrl-0 = <&usb1_pwr_en_pins>;
index a873bf94f50ca688b50a54f1c1f4ff4ef0ef76e0..5da523a728184b49bf86077eb0c4af00d63dd7a8 100644 (file)
                        status = "okay";
                };
 
-               phy@100f8800 {          /* USB3 port 1 HS phy */
+               usb3_0: usb3@110f8800 {
                        status = "okay";
                };
 
-               phy@100f8830 {          /* USB3 port 1 SS phy */
-                       status = "okay";
-               };
-
-               phy@110f8800 {          /* USB3 port 0 HS phy */
-                       status = "okay";
-               };
-
-               phy@110f8830 {          /* USB3 port 0 SS phy */
-                       status = "okay";
-               };
-
-               usb30@0 {
-                       status = "okay";
-               };
-
-               usb30@1 {
+               usb3_1: usb3@100f8800 {
                        status = "okay";
                };
 
index 7fe45a87983cf469e873f3cccce916b72a45e5a2..8d6c981d1d382a7431d306e14256e52466db53eb 100644 (file)
                        status = "okay";
                };
 
-               phy@100f8800 {          /* USB3 port 1 HS phy */
+               usb3_0: usb3@110f8800 {
                        status = "okay";
                };
 
-               phy@100f8830 {          /* USB3 port 1 SS phy */
-                       status = "okay";
-               };
-
-               phy@110f8800 {          /* USB3 port 0 HS phy */
-                       status = "okay";
-               };
-
-               phy@110f8830 {          /* USB3 port 0 SS phy */
-                       status = "okay";
-               };
-
-               usb30@0 {
-                       status = "okay";
-               };
-
-               usb30@1 {
+               usb3_1: usb3@100f8800 {
                        status = "okay";
                };
 
index 975556756041603063db84238ae7f2a2be3b0220..6c51d9507260095a48ffa8af46123fb69c2b5c56 100644 (file)
                        status = "okay";
                };
 
-               phy@100f8800 {          /* USB3 port 1 HS phy */
-                       clocks = <&gcc USB30_0_UTMI_CLK>;
-                       status = "okay";
-               };
-
-               phy@100f8830 {          /* USB3 port 1 SS phy */
-                       clocks = <&gcc USB30_0_MASTER_CLK>;
-                       status = "okay";
-               };
-
-               phy@110f8800 {          /* USB3 port 0 HS phy */
-                       clocks = <&gcc USB30_1_UTMI_CLK>;
-                       status = "okay";
-               };
-
-               phy@110f8830 {          /* USB3 port 0 SS phy */
-                       clocks = <&gcc USB30_1_MASTER_CLK>;
-                       status = "okay";
-               };
-
-               usb30@0 {
+               usb3_0: usb3@110f8800 {
                        clocks = <&gcc USB30_1_MASTER_CLK>;
                        status = "okay";
                };
 
-               usb30@1 {
+               usb3_1: usb3@100f8800 {
                        clocks = <&gcc USB30_0_MASTER_CLK>;
                        status = "okay";
                };
index 471e02c5f10ebf2609f2519abcf7691dc6045ff3..7445d92f6138202b6ab94200803bc8c44f9ab2a4 100644 (file)
                        status = "okay";
                };
 
-               phy@100f8800 {          /* USB3 port 1 HS phy */
-                       status = "okay";
-               };
-
-               phy@100f8830 {          /* USB3 port 1 SS phy */
-                       status = "okay";
-               };
-
-               phy@110f8800 {          /* USB3 port 0 HS phy */
-                       status = "okay";
-               };
-
-               phy@110f8830 {          /* USB3 port 0 SS phy */
-                       status = "okay";
-               };
-
-               usb30@0 {
+               usb3_0: usb3@110f8800 {
                        status = "okay";
 
                        pinctrl-0 = <&usb0_pwr_en_pins>;
                        pinctrl-names = "default";
                };
 
-               usb30@1 {
+               usb3_1: usb3@100f8800 {
                        status = "okay";
 
                        pinctrl-0 = <&usb1_pwr_en_pins>;
index 8c522a897d42573eaeb2cdd424a7f1a0f39dc9b2..dd272c7fc78d8e16cb170c8053a9ffdaccc79859 100644 (file)
@@ -3,18 +3,6 @@
 / {
        soc: soc {
 
-               ss_phy_0: phy@110f8830 {
-                       rx_eq = <2>;
-                       tx_deamp_3_5db = <32>;
-                       mpll = <0xa0>;
-               };
-
-               ss_phy_1: phy@100f8830 {
-                       rx_eq = <2>;
-                       tx_deamp_3_5db = <32>;
-                       mpll = <0xa0>;
-               };
-
                pcie0: pci@1b500000 {
                        phy-tx0-term-offset = <0>;
                };
                };
        };
 };
+
+&ss_phy_0 {
+       rx_eq = <2>;
+       tx_deamp_3_5db = <32>;
+       mpll = <0xa0>;
+};
+
+&ss_phy_1 {
+       rx_eq = <2>;
+       tx_deamp_3_5db = <32>;
+       mpll = <0xa0>;
+};
index 2510ca1081bf71aafbde3eeb89e16e2fa01d84d8..485a4b90e32de9a57c9daba4fb18928bdf4d96d9 100644 (file)
                        };
                };
 
-               phy@100f8800 {          /* USB3 port 1 HS phy */
+               usb3_0: usb3@110f8800 {
                        status = "okay";
                };
 
-               phy@100f8830 {          /* USB3 port 1 SS phy */
-                       status = "okay";
-               };
-
-               phy@110f8800 {          /* USB3 port 0 HS phy */
-                       status = "okay";
-               };
-
-               phy@110f8830 {          /* USB3 port 0 SS phy */
-                       status = "okay";
-               };
-
-               usb30@0 {
-                       status = "okay";
-               };
-
-               usb30@1 {
+               usb3_1: usb3@100f8800 {
                        status = "okay";
                };
 
index e2a481723b18aa053f0ab60e33bebcf16943e382..f0c377aa305cb0dfa31e251acd691ca1608a3963 100644 (file)
        };
 };
 
-&hs_phy_0 {            /* USB3 port 0 HS phy */
-       status = "okay";
-};
-
-&ss_phy_0 {            /* USB3 port 0 SS phy */
-       status = "okay";
-};
-
-&hs_phy_1 {            /* USB3 port 1 HS phy */
-       status = "okay";
-};
-
-&ss_phy_1 {            /* USB3 port 1 SS phy */
-       status = "okay";
-};
-
 &usb3_0 {
        status = "okay";
 
index 14258d594e72426658e0bdb1e13e43970912436e..e2c87f33e1138292d11687299b07a4a6121c022f 100644 (file)
        };
 };
 
-&hs_phy_0 {            /* USB3 port 0 HS phy */
-       status = "okay";
-};
-
-&hs_phy_1 {            /* USB3 port 1 HS phy */
-       status = "okay";
-};
-
 &ss_phy_0 {            /* USB3 port 0 SS phy */
        status = "okay";
 
index 2f511e498ec0f0e6ebdfb258e6e67299d6f5190d..12cfa3b0fc781c076ab701265520e8db05a6e33f 100644 (file)
        };
 };
 
-&hs_phy_0 {            /* USB3 port 0 HS phy */
-       status = "okay";
-};
-
-&ss_phy_0 {            /* USB3 port 0 SS phy */
-       status = "okay";
-};
-
-&hs_phy_1 {            /* USB3 port 1 HS phy */
-       status = "okay";
-};
-
-&ss_phy_1 {            /* USB3 port 1 SS phy */
-       status = "okay";
-};
-
 &usb3_0 {
        status = "okay";
 
index 8387460d2714e79ec88eeacc0e1b9122c895938b..54869de44fe8321b1de0af81cb4bb79d50419172 100644 (file)
                        reg = <0x01200600 0x100>;
                };
 
-               hs_phy_1: phy@100f8800 {
+               hs_phy_0: hs_phy_0 {
                        compatible = "qcom,dwc3-hs-usb-phy";
-                       reg = <0x100f8800 0x30>;
-                       clocks = <&gcc USB30_1_UTMI_CLK>;
-                       clock-names = "ref";
-                       #phy-cells = <0>;
-
-                       status = "disabled";
-               };
-
-               ss_phy_1: phy@100f8830 {
-                       compatible = "qcom,dwc3-ss-usb-phy";
-                       reg = <0x100f8830 0x30>;
-                       clocks = <&gcc USB30_1_MASTER_CLK>;
-                       clock-names = "ref";
-                       #phy-cells = <0>;
-
-                       status = "disabled";
-               };
-
-               hs_phy_0: phy@110f8800 {
-                       compatible = "qcom,dwc3-hs-usb-phy";
-                       reg = <0x110f8800 0x30>;
+                       regmap = <&usb3_0>;
                        clocks = <&gcc USB30_0_UTMI_CLK>;
                        clock-names = "ref";
                        #phy-cells = <0>;
-
-                       status = "disabled";
                };
 
-               ss_phy_0: phy@110f8830 {
+               ss_phy_0: ss_phy_0 {
                        compatible = "qcom,dwc3-ss-usb-phy";
-                       reg = <0x110f8830 0x30>;
+                       regmap = <&usb3_0>;
                        clocks = <&gcc USB30_0_MASTER_CLK>;
                        clock-names = "ref";
                        #phy-cells = <0>;
-
-                       status = "disabled";
                };
 
-               usb3_0: usb30@0 {
-                       compatible = "qcom,dwc3";
+               usb3_0: usb3@110f8800 {
+                       compatible = "qcom,dwc3", "syscon";
                        #address-cells = <1>;
                        #size-cells = <1>;
+                       reg = <0x110f8800 0x8000>;
                        clocks = <&gcc USB30_0_MASTER_CLK>;
                        clock-names = "core";
 
                        ranges;
 
                        resets = <&gcc USB30_0_MASTER_RESET>;
-                       reset-names = "usb30_0_mstr_rst";
+                       reset-names = "master";
 
                        status = "disabled";
 
                        dwc3_0: dwc3@11000000 {
                                compatible = "snps,dwc3";
                                reg = <0x11000000 0xcd00>;
-                               interrupts = <0 110 0x4>;
+                               interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
                                phys = <&hs_phy_0>, <&ss_phy_0>;
                                phy-names = "usb2-phy", "usb3-phy";
                                dr_mode = "host";
                        };
                };
 
-               usb3_1: usb30@1 {
-                       compatible = "qcom,dwc3";
+               hs_phy_1: hs_phy_1 {
+                       compatible = "qcom,dwc3-hs-usb-phy";
+                       regmap = <&usb3_1>;
+                       clocks = <&gcc USB30_1_UTMI_CLK>;
+                       clock-names = "ref";
+                       #phy-cells = <0>;
+               };
+               
+               ss_phy_1: ss_phy_1 {
+                       compatible = "qcom,dwc3-ss-usb-phy";
+                       regmap = <&usb3_1>;
+                       clocks = <&gcc USB30_1_MASTER_CLK>;
+                       clock-names = "ref";
+                       #phy-cells = <0>;
+               };
+
+               usb3_1: usb3@100f8800 {
+                       compatible = "qcom,dwc3", "syscon";
                        #address-cells = <1>;
                        #size-cells = <1>;
+                       reg = <0x100f8800 0x8000>;
                        clocks = <&gcc USB30_1_MASTER_CLK>;
                        clock-names = "core";
 
                        ranges;
 
                        resets = <&gcc USB30_1_MASTER_RESET>;
-                       reset-names = "usb30_1_mstr_rst";
+                       reset-names = "master";
 
                        status = "disabled";
 
                        dwc3_1: dwc3@10000000 {
                                compatible = "snps,dwc3";
                                reg = <0x10000000 0xcd00>;
-                               interrupts = <0 205 0x4>;
+                               interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
                                phys = <&hs_phy_1>, <&ss_phy_1>;
                                phy-names = "usb2-phy", "usb3-phy";
                                dr_mode = "host";
index 954d3fe85322f309164570e3fdf1e582785a8d7e..6576d741540138ee5030cfdf0cd685b57073e9c6 100644 (file)
                        };
                };
 
-               phy@100f8800 {          /* USB3 port 1 HS phy */
-                       status = "okay";
-               };
-
-               phy@100f8830 {          /* USB3 port 1 SS phy */
-                       status = "okay";
-               };
-
-               phy@110f8800 {          /* USB3 port 0 HS phy */
-                       status = "okay";
-               };
-
-               phy@110f8830 {          /* USB3 port 0 SS phy */
-                       status = "okay";
-               };
-
-               usb30@0 {
+               usb3_0: usb3@110f8800 {
                        status = "okay";
 
                        pinctrl-0 = <&usb0_pwr_en_pins>;
                        pinctrl-names = "default";
                };
 
-               usb30@1 {
+               usb3_1: usb3@100f8800 {
                        status = "okay";
 
                        pinctrl-0 = <&usb1_pwr_en_pins>;
index 304f948296e794c56b9a35bbe517d8e9ebe82244..82a4f348eddb88eb775f7a7b515019cf57171df0 100644 (file)
                        status = "okay";
                };
 
-               phy@100f8800 {          /* USB3 port 1 HS phy */
-                       status = "okay";
-               };
-
-               phy@100f8830 {          /* USB3 port 1 SS phy */
-                       status = "okay";
-               };
-
-               phy@110f8800 {          /* USB3 port 0 HS phy */
-                       status = "okay";
-               };
-
-               phy@110f8830 {          /* USB3 port 0 SS phy */
-                       status = "okay";
-               };
-
-               usb30@0 {
+               usb3_0: usb3@110f8800 {
                        status = "okay";
 
                        pinctrl-0 = <&usb0_pwr_en_pins>;
                        pinctrl-names = "default";
                };
 
-               usb30@1 {
+               usb3_1: usb3@100f8800 {
                        status = "okay";
 
                        pinctrl-0 = <&usb1_pwr_en_pins>;