rcar_gen3: drivers: pfc: M3W: Switch to BIT() macro

Utilise existing BIT() macro. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Idea2afc11fb5dcfc39fb319b703ee8ee9dcc3ea6

diff --git a/drivers/staging/renesas/rcar/pfc/M3/pfc_init_m3.c b/drivers/staging/renesas/rcar/pfc/M3/pfc_init_m3.c
index f455ff238825ba6867ab9d4321029c05dd2f53d8..0d7d267c56e743b36be5c763143fdac42c8536cf 100644 (file)
--- a/drivers/staging/renesas/rcar/pfc/M3/pfc_init_m3.c
+++ b/drivers/staging/renesas/rcar/pfc/M3/pfc_init_m3.c
@@ -13,162 +13,162 @@
 #include "rcar_private.h"
 #include "../pfc_regs.h"
 
-#define GPSR0_D15              ((uint32_t)1U << 15U)
-#define GPSR0_D14              ((uint32_t)1U << 14U)
-#define GPSR0_D13              ((uint32_t)1U << 13U)
-#define GPSR0_D12              ((uint32_t)1U << 12U)
-#define GPSR0_D11              ((uint32_t)1U << 11U)
-#define GPSR0_D10              ((uint32_t)1U << 10U)
-#define GPSR0_D9               ((uint32_t)1U << 9U)
-#define GPSR0_D8               ((uint32_t)1U << 8U)
-#define GPSR0_D7               ((uint32_t)1U << 7U)
-#define GPSR0_D6               ((uint32_t)1U << 6U)
-#define GPSR0_D5               ((uint32_t)1U << 5U)
-#define GPSR0_D4               ((uint32_t)1U << 4U)
-#define GPSR0_D3               ((uint32_t)1U << 3U)
-#define GPSR0_D2               ((uint32_t)1U << 2U)
-#define GPSR0_D1               ((uint32_t)1U << 1U)
-#define GPSR0_D0               ((uint32_t)1U << 0U)
-#define GPSR1_CLKOUT           ((uint32_t)1U << 28U)
-#define GPSR1_EX_WAIT0_A       ((uint32_t)1U << 27U)
-#define GPSR1_WE1              ((uint32_t)1U << 26U)
-#define GPSR1_WE0              ((uint32_t)1U << 25U)
-#define GPSR1_RD_WR            ((uint32_t)1U << 24U)
-#define GPSR1_RD               ((uint32_t)1U << 23U)
-#define GPSR1_BS               ((uint32_t)1U << 22U)
-#define GPSR1_CS1_A26          ((uint32_t)1U << 21U)
-#define GPSR1_CS0              ((uint32_t)1U << 20U)
-#define GPSR1_A19              ((uint32_t)1U << 19U)
-#define GPSR1_A18              ((uint32_t)1U << 18U)
-#define GPSR1_A17              ((uint32_t)1U << 17U)
-#define GPSR1_A16              ((uint32_t)1U << 16U)
-#define GPSR1_A15              ((uint32_t)1U << 15U)
-#define GPSR1_A14              ((uint32_t)1U << 14U)
-#define GPSR1_A13              ((uint32_t)1U << 13U)
-#define GPSR1_A12              ((uint32_t)1U << 12U)
-#define GPSR1_A11              ((uint32_t)1U << 11U)
-#define GPSR1_A10              ((uint32_t)1U << 10U)
-#define GPSR1_A9               ((uint32_t)1U << 9U)
-#define GPSR1_A8               ((uint32_t)1U << 8U)
-#define GPSR1_A7               ((uint32_t)1U << 7U)
-#define GPSR1_A6               ((uint32_t)1U << 6U)
-#define GPSR1_A5               ((uint32_t)1U << 5U)
-#define GPSR1_A4               ((uint32_t)1U << 4U)
-#define GPSR1_A3               ((uint32_t)1U << 3U)
-#define GPSR1_A2               ((uint32_t)1U << 2U)
-#define GPSR1_A1               ((uint32_t)1U << 1U)
-#define GPSR1_A0               ((uint32_t)1U << 0U)
-#define GPSR2_AVB_AVTP_CAPTURE_A       ((uint32_t)1U << 14U)
-#define GPSR2_AVB_AVTP_MATCH_A ((uint32_t)1U << 13U)
-#define GPSR2_AVB_LINK         ((uint32_t)1U << 12U)
-#define GPSR2_AVB_PHY_INT      ((uint32_t)1U << 11U)
-#define GPSR2_AVB_MAGIC                ((uint32_t)1U << 10U)
-#define GPSR2_AVB_MDC          ((uint32_t)1U << 9U)
-#define GPSR2_PWM2_A           ((uint32_t)1U << 8U)
-#define GPSR2_PWM1_A           ((uint32_t)1U << 7U)
-#define GPSR2_PWM0             ((uint32_t)1U << 6U)
-#define GPSR2_IRQ5             ((uint32_t)1U << 5U)
-#define GPSR2_IRQ4             ((uint32_t)1U << 4U)
-#define GPSR2_IRQ3             ((uint32_t)1U << 3U)
-#define GPSR2_IRQ2             ((uint32_t)1U << 2U)
-#define GPSR2_IRQ1             ((uint32_t)1U << 1U)
-#define GPSR2_IRQ0             ((uint32_t)1U << 0U)
-#define GPSR3_SD1_WP           ((uint32_t)1U << 15U)
-#define GPSR3_SD1_CD           ((uint32_t)1U << 14U)
-#define GPSR3_SD0_WP           ((uint32_t)1U << 13U)
-#define GPSR3_SD0_CD           ((uint32_t)1U << 12U)
-#define GPSR3_SD1_DAT3         ((uint32_t)1U << 11U)
-#define GPSR3_SD1_DAT2         ((uint32_t)1U << 10U)
-#define GPSR3_SD1_DAT1         ((uint32_t)1U << 9U)
-#define GPSR3_SD1_DAT0         ((uint32_t)1U << 8U)
-#define GPSR3_SD1_CMD          ((uint32_t)1U << 7U)
-#define GPSR3_SD1_CLK          ((uint32_t)1U << 6U)
-#define GPSR3_SD0_DAT3         ((uint32_t)1U << 5U)
-#define GPSR3_SD0_DAT2         ((uint32_t)1U << 4U)
-#define GPSR3_SD0_DAT1         ((uint32_t)1U << 3U)
-#define GPSR3_SD0_DAT0         ((uint32_t)1U << 2U)
-#define GPSR3_SD0_CMD          ((uint32_t)1U << 1U)
-#define GPSR3_SD0_CLK          ((uint32_t)1U << 0U)
-#define GPSR4_SD3_DS           ((uint32_t)1U << 17U)
-#define GPSR4_SD3_DAT7         ((uint32_t)1U << 16U)
-#define GPSR4_SD3_DAT6         ((uint32_t)1U << 15U)
-#define GPSR4_SD3_DAT5         ((uint32_t)1U << 14U)
-#define GPSR4_SD3_DAT4         ((uint32_t)1U << 13U)
-#define GPSR4_SD3_DAT3         ((uint32_t)1U << 12U)
-#define GPSR4_SD3_DAT2         ((uint32_t)1U << 11U)
-#define GPSR4_SD3_DAT1         ((uint32_t)1U << 10U)
-#define GPSR4_SD3_DAT0         ((uint32_t)1U << 9U)
-#define GPSR4_SD3_CMD          ((uint32_t)1U << 8U)
-#define GPSR4_SD3_CLK          ((uint32_t)1U << 7U)
-#define GPSR4_SD2_DS           ((uint32_t)1U << 6U)
-#define GPSR4_SD2_DAT3         ((uint32_t)1U << 5U)
-#define GPSR4_SD2_DAT2         ((uint32_t)1U << 4U)
-#define GPSR4_SD2_DAT1         ((uint32_t)1U << 3U)
-#define GPSR4_SD2_DAT0         ((uint32_t)1U << 2U)
-#define GPSR4_SD2_CMD          ((uint32_t)1U << 1U)
-#define GPSR4_SD2_CLK          ((uint32_t)1U << 0U)
-#define GPSR5_MLB_DAT          ((uint32_t)1U << 25U)
-#define GPSR5_MLB_SIG          ((uint32_t)1U << 24U)
-#define GPSR5_MLB_CLK          ((uint32_t)1U << 23U)
-#define GPSR5_MSIOF0_RXD       ((uint32_t)1U << 22U)
-#define GPSR5_MSIOF0_SS2       ((uint32_t)1U << 21U)
-#define GPSR5_MSIOF0_TXD       ((uint32_t)1U << 20U)
-#define GPSR5_MSIOF0_SS1       ((uint32_t)1U << 19U)
-#define GPSR5_MSIOF0_SYNC      ((uint32_t)1U << 18U)
-#define GPSR5_MSIOF0_SCK       ((uint32_t)1U << 17U)
-#define GPSR5_HRTS0            ((uint32_t)1U << 16U)
-#define GPSR5_HCTS0            ((uint32_t)1U << 15U)
-#define GPSR5_HTX0             ((uint32_t)1U << 14U)
-#define GPSR5_HRX0             ((uint32_t)1U << 13U)
-#define GPSR5_HSCK0            ((uint32_t)1U << 12U)
-#define GPSR5_RX2_A            ((uint32_t)1U << 11U)
-#define GPSR5_TX2_A            ((uint32_t)1U << 10U)
-#define GPSR5_SCK2             ((uint32_t)1U << 9U)
-#define GPSR5_RTS1_TANS                ((uint32_t)1U << 8U)
-#define GPSR5_CTS1             ((uint32_t)1U << 7U)
-#define GPSR5_TX1_A            ((uint32_t)1U << 6U)
-#define GPSR5_RX1_A            ((uint32_t)1U << 5U)
-#define GPSR5_RTS0_TANS                ((uint32_t)1U << 4U)
-#define GPSR5_CTS0             ((uint32_t)1U << 3U)
-#define GPSR5_TX0              ((uint32_t)1U << 2U)
-#define GPSR5_RX0              ((uint32_t)1U << 1U)
-#define GPSR5_SCK0             ((uint32_t)1U << 0U)
-#define GPSR6_USB31_OVC                ((uint32_t)1U << 31U)
-#define GPSR6_USB31_PWEN       ((uint32_t)1U << 30U)
-#define GPSR6_USB30_OVC                ((uint32_t)1U << 29U)
-#define GPSR6_USB30_PWEN       ((uint32_t)1U << 28U)
-#define GPSR6_USB1_OVC         ((uint32_t)1U << 27U)
-#define GPSR6_USB1_PWEN                ((uint32_t)1U << 26U)
-#define GPSR6_USB0_OVC         ((uint32_t)1U << 25U)
-#define GPSR6_USB0_PWEN                ((uint32_t)1U << 24U)
-#define GPSR6_AUDIO_CLKB_B     ((uint32_t)1U << 23U)
-#define GPSR6_AUDIO_CLKA_A     ((uint32_t)1U << 22U)
-#define GPSR6_SSI_SDATA9_A     ((uint32_t)1U << 21U)
-#define GPSR6_SSI_SDATA8       ((uint32_t)1U << 20U)
-#define GPSR6_SSI_SDATA7       ((uint32_t)1U << 19U)
-#define GPSR6_SSI_WS78         ((uint32_t)1U << 18U)
-#define GPSR6_SSI_SCK78                ((uint32_t)1U << 17U)
-#define GPSR6_SSI_SDATA6       ((uint32_t)1U << 16U)
-#define GPSR6_SSI_WS6          ((uint32_t)1U << 15U)
-#define GPSR6_SSI_SCK6         ((uint32_t)1U << 14U)
-#define GPSR6_SSI_SDATA5       ((uint32_t)1U << 13U)
-#define GPSR6_SSI_WS5          ((uint32_t)1U << 12U)
-#define GPSR6_SSI_SCK5         ((uint32_t)1U << 11U)
-#define GPSR6_SSI_SDATA4       ((uint32_t)1U << 10U)
-#define GPSR6_SSI_WS4          ((uint32_t)1U << 9U)
-#define GPSR6_SSI_SCK4         ((uint32_t)1U << 8U)
-#define GPSR6_SSI_SDATA3       ((uint32_t)1U << 7U)
-#define GPSR6_SSI_WS34         ((uint32_t)1U << 6U)
-#define GPSR6_SSI_SCK34                ((uint32_t)1U << 5U)
-#define GPSR6_SSI_SDATA2_A     ((uint32_t)1U << 4U)
-#define GPSR6_SSI_SDATA1_A     ((uint32_t)1U << 3U)
-#define GPSR6_SSI_SDATA0       ((uint32_t)1U << 2U)
-#define GPSR6_SSI_WS0129       ((uint32_t)1U << 1U)
-#define GPSR6_SSI_SCK0129      ((uint32_t)1U << 0U)
-#define GPSR7_HDMI1_CEC                ((uint32_t)1U << 3U)
-#define GPSR7_HDMI0_CEC                ((uint32_t)1U << 2U)
-#define GPSR7_AVS2             ((uint32_t)1U << 1U)
-#define GPSR7_AVS1             ((uint32_t)1U << 0U)
+#define GPSR0_D15              BIT(15)
+#define GPSR0_D14              BIT(14)
+#define GPSR0_D13              BIT(13)
+#define GPSR0_D12              BIT(12)
+#define GPSR0_D11              BIT(11)
+#define GPSR0_D10              BIT(10)
+#define GPSR0_D9               BIT(9)
+#define GPSR0_D8               BIT(8)
+#define GPSR0_D7               BIT(7)
+#define GPSR0_D6               BIT(6)
+#define GPSR0_D5               BIT(5)
+#define GPSR0_D4               BIT(4)
+#define GPSR0_D3               BIT(3)
+#define GPSR0_D2               BIT(2)
+#define GPSR0_D1               BIT(1)
+#define GPSR0_D0               BIT(0)
+#define GPSR1_CLKOUT           BIT(28)
+#define GPSR1_EX_WAIT0_A       BIT(27)
+#define GPSR1_WE1              BIT(26)
+#define GPSR1_WE0              BIT(25)
+#define GPSR1_RD_WR            BIT(24)
+#define GPSR1_RD               BIT(23)
+#define GPSR1_BS               BIT(22)
+#define GPSR1_CS1_A26          BIT(21)
+#define GPSR1_CS0              BIT(20)
+#define GPSR1_A19              BIT(19)
+#define GPSR1_A18              BIT(18)
+#define GPSR1_A17              BIT(17)
+#define GPSR1_A16              BIT(16)
+#define GPSR1_A15              BIT(15)
+#define GPSR1_A14              BIT(14)
+#define GPSR1_A13              BIT(13)
+#define GPSR1_A12              BIT(12)
+#define GPSR1_A11              BIT(11)
+#define GPSR1_A10              BIT(10)
+#define GPSR1_A9               BIT(9)
+#define GPSR1_A8               BIT(8)
+#define GPSR1_A7               BIT(7)
+#define GPSR1_A6               BIT(6)
+#define GPSR1_A5               BIT(5)
+#define GPSR1_A4               BIT(4)
+#define GPSR1_A3               BIT(3)
+#define GPSR1_A2               BIT(2)
+#define GPSR1_A1               BIT(1)
+#define GPSR1_A0               BIT(0)
+#define GPSR2_AVB_AVTP_CAPTURE_A       BIT(14)
+#define GPSR2_AVB_AVTP_MATCH_A BIT(13)
+#define GPSR2_AVB_LINK         BIT(12)
+#define GPSR2_AVB_PHY_INT      BIT(11)
+#define GPSR2_AVB_MAGIC                BIT(10)
+#define GPSR2_AVB_MDC          BIT(9)
+#define GPSR2_PWM2_A           BIT(8)
+#define GPSR2_PWM1_A           BIT(7)
+#define GPSR2_PWM0             BIT(6)
+#define GPSR2_IRQ5             BIT(5)
+#define GPSR2_IRQ4             BIT(4)
+#define GPSR2_IRQ3             BIT(3)
+#define GPSR2_IRQ2             BIT(2)
+#define GPSR2_IRQ1             BIT(1)
+#define GPSR2_IRQ0             BIT(0)
+#define GPSR3_SD1_WP           BIT(15)
+#define GPSR3_SD1_CD           BIT(14)
+#define GPSR3_SD0_WP           BIT(13)
+#define GPSR3_SD0_CD           BIT(12)
+#define GPSR3_SD1_DAT3         BIT(11)
+#define GPSR3_SD1_DAT2         BIT(10)
+#define GPSR3_SD1_DAT1         BIT(9)
+#define GPSR3_SD1_DAT0         BIT(8)
+#define GPSR3_SD1_CMD          BIT(7)
+#define GPSR3_SD1_CLK          BIT(6)
+#define GPSR3_SD0_DAT3         BIT(5)
+#define GPSR3_SD0_DAT2         BIT(4)
+#define GPSR3_SD0_DAT1         BIT(3)
+#define GPSR3_SD0_DAT0         BIT(2)
+#define GPSR3_SD0_CMD          BIT(1)
+#define GPSR3_SD0_CLK          BIT(0)
+#define GPSR4_SD3_DS           BIT(17)
+#define GPSR4_SD3_DAT7         BIT(16)
+#define GPSR4_SD3_DAT6         BIT(15)
+#define GPSR4_SD3_DAT5         BIT(14)
+#define GPSR4_SD3_DAT4         BIT(13)
+#define GPSR4_SD3_DAT3         BIT(12)
+#define GPSR4_SD3_DAT2         BIT(11)
+#define GPSR4_SD3_DAT1         BIT(10)
+#define GPSR4_SD3_DAT0         BIT(9)
+#define GPSR4_SD3_CMD          BIT(8)
+#define GPSR4_SD3_CLK          BIT(7)
+#define GPSR4_SD2_DS           BIT(6)
+#define GPSR4_SD2_DAT3         BIT(5)
+#define GPSR4_SD2_DAT2         BIT(4)
+#define GPSR4_SD2_DAT1         BIT(3)
+#define GPSR4_SD2_DAT0         BIT(2)
+#define GPSR4_SD2_CMD          BIT(1)
+#define GPSR4_SD2_CLK          BIT(0)
+#define GPSR5_MLB_DAT          BIT(25)
+#define GPSR5_MLB_SIG          BIT(24)
+#define GPSR5_MLB_CLK          BIT(23)
+#define GPSR5_MSIOF0_RXD       BIT(22)
+#define GPSR5_MSIOF0_SS2       BIT(21)
+#define GPSR5_MSIOF0_TXD       BIT(20)
+#define GPSR5_MSIOF0_SS1       BIT(19)
+#define GPSR5_MSIOF0_SYNC      BIT(18)
+#define GPSR5_MSIOF0_SCK       BIT(17)
+#define GPSR5_HRTS0            BIT(16)
+#define GPSR5_HCTS0            BIT(15)
+#define GPSR5_HTX0             BIT(14)
+#define GPSR5_HRX0             BIT(13)
+#define GPSR5_HSCK0            BIT(12)
+#define GPSR5_RX2_A            BIT(11)
+#define GPSR5_TX2_A            BIT(10)
+#define GPSR5_SCK2             BIT(9)
+#define GPSR5_RTS1_TANS                BIT(8)
+#define GPSR5_CTS1             BIT(7)
+#define GPSR5_TX1_A            BIT(6)
+#define GPSR5_RX1_A            BIT(5)
+#define GPSR5_RTS0_TANS                BIT(4)
+#define GPSR5_CTS0             BIT(3)
+#define GPSR5_TX0              BIT(2)
+#define GPSR5_RX0              BIT(1)
+#define GPSR5_SCK0             BIT(0)
+#define GPSR6_USB31_OVC                BIT(31)
+#define GPSR6_USB31_PWEN       BIT(30)
+#define GPSR6_USB30_OVC                BIT(29)
+#define GPSR6_USB30_PWEN       BIT(28)
+#define GPSR6_USB1_OVC         BIT(27)
+#define GPSR6_USB1_PWEN                BIT(26)
+#define GPSR6_USB0_OVC         BIT(25)
+#define GPSR6_USB0_PWEN                BIT(24)
+#define GPSR6_AUDIO_CLKB_B     BIT(23)
+#define GPSR6_AUDIO_CLKA_A     BIT(22)
+#define GPSR6_SSI_SDATA9_A     BIT(21)
+#define GPSR6_SSI_SDATA8       BIT(20)
+#define GPSR6_SSI_SDATA7       BIT(19)
+#define GPSR6_SSI_WS78         BIT(18)
+#define GPSR6_SSI_SCK78                BIT(17)
+#define GPSR6_SSI_SDATA6       BIT(16)
+#define GPSR6_SSI_WS6          BIT(15)
+#define GPSR6_SSI_SCK6         BIT(14)
+#define GPSR6_SSI_SDATA5       BIT(13)
+#define GPSR6_SSI_WS5          BIT(12)
+#define GPSR6_SSI_SCK5         BIT(11)
+#define GPSR6_SSI_SDATA4       BIT(10)
+#define GPSR6_SSI_WS4          BIT(9)
+#define GPSR6_SSI_SCK4         BIT(8)
+#define GPSR6_SSI_SDATA3       BIT(7)
+#define GPSR6_SSI_WS34         BIT(6)
+#define GPSR6_SSI_SCK34                BIT(5)
+#define GPSR6_SSI_SDATA2_A     BIT(4)
+#define GPSR6_SSI_SDATA1_A     BIT(3)
+#define GPSR6_SSI_SDATA0       BIT(2)
+#define GPSR6_SSI_WS0129       BIT(1)
+#define GPSR6_SSI_SCK0129      BIT(0)
+#define GPSR7_HDMI1_CEC                BIT(3)
+#define GPSR7_HDMI0_CEC                BIT(2)
+#define GPSR7_AVS2             BIT(1)
+#define GPSR7_AVS1             BIT(0)
 
 #define IPSR_28_FUNC(x)                ((uint32_t)(x) << 28U)
 #define IPSR_24_FUNC(x)                ((uint32_t)(x) << 24U)
@@ -179,36 +179,36 @@
 #define IPSR_4_FUNC(x)         ((uint32_t)(x) << 4U)
 #define IPSR_0_FUNC(x)         ((uint32_t)(x) << 0U)
 
-#define POC_SD3_DS_33V         ((uint32_t)1U << 29U)
-#define POC_SD3_DAT7_33V       ((uint32_t)1U << 28U)
-#define POC_SD3_DAT6_33V       ((uint32_t)1U << 27U)
-#define POC_SD3_DAT5_33V       ((uint32_t)1U << 26U)
-#define POC_SD3_DAT4_33V       ((uint32_t)1U << 25U)
-#define POC_SD3_DAT3_33V       ((uint32_t)1U << 24U)
-#define POC_SD3_DAT2_33V       ((uint32_t)1U << 23U)
-#define POC_SD3_DAT1_33V       ((uint32_t)1U << 22U)
-#define POC_SD3_DAT0_33V       ((uint32_t)1U << 21U)
-#define POC_SD3_CMD_33V                ((uint32_t)1U << 20U)
-#define POC_SD3_CLK_33V                ((uint32_t)1U << 19U)
-#define POC_SD2_DS_33V         ((uint32_t)1U << 18U)
-#define POC_SD2_DAT3_33V       ((uint32_t)1U << 17U)
-#define POC_SD2_DAT2_33V       ((uint32_t)1U << 16U)
-#define POC_SD2_DAT1_33V       ((uint32_t)1U << 15U)
-#define POC_SD2_DAT0_33V       ((uint32_t)1U << 14U)
-#define POC_SD2_CMD_33V                ((uint32_t)1U << 13U)
-#define POC_SD2_CLK_33V                ((uint32_t)1U << 12U)
-#define POC_SD1_DAT3_33V       ((uint32_t)1U << 11U)
-#define POC_SD1_DAT2_33V       ((uint32_t)1U << 10U)
-#define POC_SD1_DAT1_33V       ((uint32_t)1U << 9U)
-#define POC_SD1_DAT0_33V       ((uint32_t)1U << 8U)
-#define POC_SD1_CMD_33V                ((uint32_t)1U << 7U)
-#define POC_SD1_CLK_33V                ((uint32_t)1U << 6U)
-#define POC_SD0_DAT3_33V       ((uint32_t)1U << 5U)
-#define POC_SD0_DAT2_33V       ((uint32_t)1U << 4U)
-#define POC_SD0_DAT1_33V       ((uint32_t)1U << 3U)
-#define POC_SD0_DAT0_33V       ((uint32_t)1U << 2U)
-#define POC_SD0_CMD_33V                ((uint32_t)1U << 1U)
-#define POC_SD0_CLK_33V                ((uint32_t)1U << 0U)
+#define POC_SD3_DS_33V         BIT(29)
+#define POC_SD3_DAT7_33V       BIT(28)
+#define POC_SD3_DAT6_33V       BIT(27)
+#define POC_SD3_DAT5_33V       BIT(26)
+#define POC_SD3_DAT4_33V       BIT(25)
+#define POC_SD3_DAT3_33V       BIT(24)
+#define POC_SD3_DAT2_33V       BIT(23)
+#define POC_SD3_DAT1_33V       BIT(22)
+#define POC_SD3_DAT0_33V       BIT(21)
+#define POC_SD3_CMD_33V                BIT(20)
+#define POC_SD3_CLK_33V                BIT(19)
+#define POC_SD2_DS_33V         BIT(18)
+#define POC_SD2_DAT3_33V       BIT(17)
+#define POC_SD2_DAT2_33V       BIT(16)
+#define POC_SD2_DAT1_33V       BIT(15)
+#define POC_SD2_DAT0_33V       BIT(14)
+#define POC_SD2_CMD_33V                BIT(13)
+#define POC_SD2_CLK_33V                BIT(12)
+#define POC_SD1_DAT3_33V       BIT(11)
+#define POC_SD1_DAT2_33V       BIT(10)
+#define POC_SD1_DAT1_33V       BIT(9)
+#define POC_SD1_DAT0_33V       BIT(8)
+#define POC_SD1_CMD_33V                BIT(7)
+#define POC_SD1_CLK_33V                BIT(6)
+#define POC_SD0_DAT3_33V       BIT(5)
+#define POC_SD0_DAT2_33V       BIT(4)
+#define POC_SD0_DAT1_33V       BIT(3)
+#define POC_SD0_DAT0_33V       BIT(2)
+#define POC_SD0_CMD_33V                BIT(1)
+#define POC_SD0_CLK_33V                BIT(0)
 
 #define DRVCTRL0_MASK          (0xCCCCCCCCU)
 #define DRVCTRL1_MASK          (0xCCCCCCC8U)
@@ -626,7 +626,7 @@ static void StartRtDma0_Descriptor(void)
                mstpcr_write(CPG_SCMSTPCR0, CPG_MSTPSR0, SCMSTPCR0_RTDMAC);
 
                /* Initialize ch0, Reset Descriptor */
-               mmio_write_32(RTDMAC_RDMCHCLR, ((uint32_t)1U << RTDMAC_CH));
+               mmio_write_32(RTDMAC_RDMCHCLR, BIT(RTDMAC_CH));
                mmio_write_32(RTDMAC_RDMCHCRB(RTDMAC_CH), RDMCHCRB_DRST);
 
                /* Enable DMA */