drm/nouveau/mc/gf100-: handle second interrupt tree

Doesn't fix any known issue, but best be safe in case control is handed
to us from firmware with these left enabled.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c
index 5ad00809d66fb7fdc379c626844c1766306aa177..6688d233a3e572f5fb236139e0ab40f94f443574 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c
@@ -48,6 +48,32 @@ gf100_mc_intr[] = {
        {},
 };
 
+void
+gf100_mc_intr_unarm(struct nvkm_mc *mc)
+{
+       struct nvkm_device *device = mc->subdev.device;
+       nvkm_wr32(device, 0x000140, 0x00000000);
+       nvkm_wr32(device, 0x000144, 0x00000000);
+       nvkm_rd32(device, 0x000140);
+}
+
+void
+gf100_mc_intr_rearm(struct nvkm_mc *mc)
+{
+       struct nvkm_device *device = mc->subdev.device;
+       nvkm_wr32(device, 0x000140, 0x00000001);
+       nvkm_wr32(device, 0x000144, 0x00000001);
+}
+
+u32
+gf100_mc_intr_mask(struct nvkm_mc *mc)
+{
+       struct nvkm_device *device = mc->subdev.device;
+       u32 intr0 = nvkm_rd32(device, 0x000100);
+       u32 intr1 = nvkm_rd32(device, 0x000104);
+       return intr0 | intr1;
+}
+
 static void
 gf100_mc_msi_rearm(struct nvkm_mc *mc)
 {
@@ -64,9 +90,9 @@ static const struct nvkm_mc_func
 gf100_mc = {
        .init = nv50_mc_init,
        .intr = gf100_mc_intr,
-       .intr_unarm = nv04_mc_intr_unarm,
-       .intr_rearm = nv04_mc_intr_rearm,
-       .intr_mask = nv04_mc_intr_mask,
+       .intr_unarm = gf100_mc_intr_unarm,
+       .intr_rearm = gf100_mc_intr_rearm,
+       .intr_mask = gf100_mc_intr_mask,
        .msi_rearm = gf100_mc_msi_rearm,
        .unk260 = gf100_mc_unk260,
 };

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf106.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf106.c
index 435f788b78bd038276893224c2994b4308e73786..31223cfa1a0a8ac52ba1b55bf136e7f643566a08 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf106.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf106.c
@@ -27,9 +27,9 @@ static const struct nvkm_mc_func
 gf106_mc = {
        .init = nv50_mc_init,
        .intr = gf100_mc_intr,
-       .intr_unarm = nv04_mc_intr_unarm,
-       .intr_rearm = nv04_mc_intr_rearm,
-       .intr_mask = nv04_mc_intr_mask,
+       .intr_unarm = gf100_mc_intr_unarm,
+       .intr_rearm = gf100_mc_intr_rearm,
+       .intr_mask = gf100_mc_intr_mask,
        .msi_rearm = nv40_mc_msi_rearm,
        .unk260 = gf100_mc_unk260,
 };

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c
index 9a8b5662020749ce167b49404dfd634061d9db4a..0592bd54bb82c1a754c410c411cbf2a4cc9b981b 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c
@@ -27,9 +27,9 @@ static const struct nvkm_mc_func
 gk20a_mc = {
        .init = nv50_mc_init,
        .intr = gf100_mc_intr,
-       .intr_unarm = nv04_mc_intr_unarm,
-       .intr_rearm = nv04_mc_intr_rearm,
-       .intr_mask = nv04_mc_intr_mask,
+       .intr_unarm = gf100_mc_intr_unarm,
+       .intr_rearm = gf100_mc_intr_rearm,
+       .intr_mask = gf100_mc_intr_mask,
        .msi_rearm = nv40_mc_msi_rearm,
 };
 

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h
index 5f9407281b6fd1322b8ec79572e0a4be985d6973..5e10ea6054223757f50bdc16ff0db00f6c923052 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h
@@ -38,5 +38,8 @@ void nv50_mc_init(struct nvkm_mc *);
 extern const struct nvkm_mc_intr nv50_mc_intr[];
 
 extern const struct nvkm_mc_intr gf100_mc_intr[];
+void gf100_mc_intr_unarm(struct nvkm_mc *);
+void gf100_mc_intr_rearm(struct nvkm_mc *);
+u32 gf100_mc_intr_mask(struct nvkm_mc *);
 void gf100_mc_unk260(struct nvkm_mc *, u32);
 #endif