x86: Make chromebook_link the default board for coreboot
authorBin Meng <bmeng.cn@gmail.com>
Tue, 6 Jan 2015 14:14:21 +0000 (22:14 +0800)
committerSimon Glass <sjg@chromium.org>
Tue, 13 Jan 2015 15:25:04 +0000 (07:25 -0800)
Change SYS_CONFIG_NAME and DEFAULT_DEVICE_TREE to chromebook_link
which is currently the only real board officially supported to run
U-Boot loaded by coreboot.

Note the symbolic link file chromebook_link.dts is deleted and
link.dts is renamed to chromebook_link.dts.

To avoid multiple definition of video_hw_init, the CONFIG_VIDEO_X86
define needs to be moved to arch/x86/cpu/ivybridge/Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/x86/dts/Makefile
arch/x86/dts/chromebook_link.dts [changed from symlink to file mode: 0644]
arch/x86/dts/link.dts [deleted file]
board/coreboot/coreboot/Kconfig
configs/chromebook_link_defconfig
configs/coreboot-x86_defconfig
drivers/video/Kconfig
include/configs/chromebook_link.h

index 5525094539859381e750646477b892d51fc719c5..97ed8842885ea7da00ab8606b92b6ba2a41eaa4a 100644 (file)
@@ -1,5 +1,4 @@
-dtb-y += link.dtb \
-       chromebook_link.dtb \
+dtb-y += chromebook_link.dtb \
        crownbay.dtb
 
 targets += $(dtb-y)
deleted file mode 120000 (symlink)
index 6f8c5cdba79999f9c59db12e8e45516601538f76..0000000000000000000000000000000000000000
+++ /dev/null
@@ -1 +0,0 @@
-link.dts
\ No newline at end of file
new file mode 100644 (file)
index 0000000000000000000000000000000000000000..9490b169fb52a3e30c48adca4bef6ffdb148d1f3
--- /dev/null
@@ -0,0 +1,216 @@
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+/include/ "serial.dtsi"
+
+/ {
+       model = "Google Link";
+       compatible = "google,link", "intel,celeron-ivybridge";
+
+       config {
+              silent_console = <0>;
+       };
+
+       gpioa {
+               compatible = "intel,ich6-gpio";
+               u-boot,dm-pre-reloc;
+               reg = <0 0x10>;
+               bank-name = "A";
+       };
+
+       gpiob {
+               compatible = "intel,ich6-gpio";
+               u-boot,dm-pre-reloc;
+               reg = <0x30 0x10>;
+               bank-name = "B";
+       };
+
+       gpioc {
+               compatible = "intel,ich6-gpio";
+               u-boot,dm-pre-reloc;
+               reg = <0x40 0x10>;
+               bank-name = "C";
+       };
+
+       chosen {
+               stdout-path = "/serial";
+       };
+
+       spd {
+               compatible = "memory-spd";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               elpida_4Gb_1600_x16 {
+                       reg = <0>;
+                       data = [92 10 0b 03 04 19 02 02
+                               03 52 01 08 0a 00 fe 00
+                               69 78 69 3c 69 11 18 81
+                               20 08 3c 3c 01 40 83 81
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 0f 11 42 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 02 fe 00
+                               11 52 00 00 00 07 7f 37
+                               45 42 4a 32 30 55 47 36
+                               45 42 55 30 2d 47 4e 2d
+                               46 20 30 20 02 fe 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00];
+               };
+               samsung_4Gb_1600_1.35v_x16 {
+                       reg = <1>;
+                       data = [92 11 0b 03 04 19 02 02
+                               03 11 01 08 0a 00 fe 00
+                               69 78 69 3c 69 11 18 81
+                               f0 0a 3c 3c 01 40 83 01
+                               00 80 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 0f 11 02 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 80 ce 01
+                               00 00 00 00 00 00 6a 04
+                               4d 34 37 31 42 35 36 37
+                               34 42 48 30 2d 59 4b 30
+                               20 20 00 00 80 ce 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00];
+                       };
+               micron_4Gb_1600_1.35v_x16 {
+                       reg = <2>;
+                       data = [92 11 0b 03 04 19 02 02
+                               03 11 01 08 0a 00 fe 00
+                               69 78 69 3c 69 11 18 81
+                               20 08 3c 3c 01 40 83 05
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 0f 01 02 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 80 2c 00
+                               00 00 00 00 00 00 ad 75
+                               34 4b 54 46 32 35 36 36
+                               34 48 5a 2d 31 47 36 45
+                               31 20 45 31 80 2c 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff];
+               };
+       };
+
+       spi {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "intel,ich9";
+               spi-flash@0 {
+                       reg = <0>;
+                       compatible = "winbond,w25q64", "spi-flash";
+                       memory-map = <0xff800000 0x00800000>;
+               };
+       };
+
+       pci {
+               sata {
+                       compatible = "intel,pantherpoint-ahci";
+                       intel,sata-mode = "ahci";
+                       intel,sata-port-map = <1>;
+                       intel,sata-port0-gen3-tx = <0x00880a7f>;
+               };
+
+               gma {
+                       compatible = "intel,gma";
+                       intel,dp_hotplug = <0 0 0x06>;
+                       intel,panel-port-select = <1>;
+                       intel,panel-power-cycle-delay = <6>;
+                       intel,panel-power-up-delay = <2000>;
+                       intel,panel-power-down-delay = <500>;
+                       intel,panel-power-backlight-on-delay = <2000>;
+                       intel,panel-power-backlight-off-delay = <2000>;
+                       intel,cpu-backlight = <0x00000200>;
+                       intel,pch-backlight = <0x04000000>;
+               };
+
+               lpc {
+                       compatible = "intel,lpc";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       gen-dec = <0x800 0xfc 0x900 0xfc>;
+                       intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
+                       intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
+                                               0x80 0x80 0x80 0x80>;
+                       intel,gpi-routing = <0 0 0 0 0 0 0 2
+                                               1 0 0 0 0 0 0 0>;
+                       /* Enable EC SMI source */
+                       intel,alt-gp-smi-enable = <0x0100>;
+
+                       cros-ec@200 {
+                               compatible = "google,cros-ec";
+                               reg = <0x204 1 0x200 1 0x880 0x80>;
+
+                               /* Describes the flash memory within the EC */
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               flash@8000000 {
+                                       reg = <0x08000000 0x20000>;
+                                       erase-value = <0xff>;
+                               };
+                       };
+               };
+       };
+
+       microcode {
+               update@0 {
+#include "microcode/m12306a9_0000001b.dtsi"
+               };
+       };
+
+};
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts
deleted file mode 100644 (file)
index 9490b16..0000000
+++ /dev/null
@@ -1,216 +0,0 @@
-/dts-v1/;
-
-/include/ "skeleton.dtsi"
-/include/ "serial.dtsi"
-
-/ {
-       model = "Google Link";
-       compatible = "google,link", "intel,celeron-ivybridge";
-
-       config {
-              silent_console = <0>;
-       };
-
-       gpioa {
-               compatible = "intel,ich6-gpio";
-               u-boot,dm-pre-reloc;
-               reg = <0 0x10>;
-               bank-name = "A";
-       };
-
-       gpiob {
-               compatible = "intel,ich6-gpio";
-               u-boot,dm-pre-reloc;
-               reg = <0x30 0x10>;
-               bank-name = "B";
-       };
-
-       gpioc {
-               compatible = "intel,ich6-gpio";
-               u-boot,dm-pre-reloc;
-               reg = <0x40 0x10>;
-               bank-name = "C";
-       };
-
-       chosen {
-               stdout-path = "/serial";
-       };
-
-       spd {
-               compatible = "memory-spd";
-               #address-cells = <1>;
-               #size-cells = <0>;
-               elpida_4Gb_1600_x16 {
-                       reg = <0>;
-                       data = [92 10 0b 03 04 19 02 02
-                               03 52 01 08 0a 00 fe 00
-                               69 78 69 3c 69 11 18 81
-                               20 08 3c 3c 01 40 83 81
-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 0f 11 42 00
-                               00 00 00 00 00 00 00 00
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-                               11 52 00 00 00 07 7f 37
-                               45 42 4a 32 30 55 47 36
-                               45 42 55 30 2d 47 4e 2d
-                               46 20 30 20 02 fe 00 00
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-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 00 00 00 00];
-               };
-               samsung_4Gb_1600_1.35v_x16 {
-                       reg = <1>;
-                       data = [92 11 0b 03 04 19 02 02
-                               03 11 01 08 0a 00 fe 00
-                               69 78 69 3c 69 11 18 81
-                               f0 0a 3c 3c 01 40 83 01
-                               00 80 00 00 00 00 00 00
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-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 0f 11 02 00
-                               00 00 00 00 00 00 00 00
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-                               00 00 00 00 00 80 ce 01
-                               00 00 00 00 00 00 6a 04
-                               4d 34 37 31 42 35 36 37
-                               34 42 48 30 2d 59 4b 30
-                               20 20 00 00 80 ce 00 00
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-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 00 00 00 00];
-                       };
-               micron_4Gb_1600_1.35v_x16 {
-                       reg = <2>;
-                       data = [92 11 0b 03 04 19 02 02
-                               03 11 01 08 0a 00 fe 00
-                               69 78 69 3c 69 11 18 81
-                               20 08 3c 3c 01 40 83 05
-                               00 00 00 00 00 00 00 00
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-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 0f 01 02 00
-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 00 00 00 00
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-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 00 80 2c 00
-                               00 00 00 00 00 00 ad 75
-                               34 4b 54 46 32 35 36 36
-                               34 48 5a 2d 31 47 36 45
-                               31 20 45 31 80 2c 00 00
-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 00 00 00 00
-                               00 00 00 00 00 00 00 00
-                               ff ff ff ff ff ff ff ff
-                               ff ff ff ff ff ff ff ff
-                               ff ff ff ff ff ff ff ff
-                               ff ff ff ff ff ff ff ff
-                               ff ff ff ff ff ff ff ff
-                               ff ff ff ff ff ff ff ff
-                               ff ff ff ff ff ff ff ff
-                               ff ff ff ff ff ff ff ff
-                               ff ff ff ff ff ff ff ff
-                               ff ff ff ff ff ff ff ff];
-               };
-       };
-
-       spi {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "intel,ich9";
-               spi-flash@0 {
-                       reg = <0>;
-                       compatible = "winbond,w25q64", "spi-flash";
-                       memory-map = <0xff800000 0x00800000>;
-               };
-       };
-
-       pci {
-               sata {
-                       compatible = "intel,pantherpoint-ahci";
-                       intel,sata-mode = "ahci";
-                       intel,sata-port-map = <1>;
-                       intel,sata-port0-gen3-tx = <0x00880a7f>;
-               };
-
-               gma {
-                       compatible = "intel,gma";
-                       intel,dp_hotplug = <0 0 0x06>;
-                       intel,panel-port-select = <1>;
-                       intel,panel-power-cycle-delay = <6>;
-                       intel,panel-power-up-delay = <2000>;
-                       intel,panel-power-down-delay = <500>;
-                       intel,panel-power-backlight-on-delay = <2000>;
-                       intel,panel-power-backlight-off-delay = <2000>;
-                       intel,cpu-backlight = <0x00000200>;
-                       intel,pch-backlight = <0x04000000>;
-               };
-
-               lpc {
-                       compatible = "intel,lpc";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       gen-dec = <0x800 0xfc 0x900 0xfc>;
-                       intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
-                       intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
-                                               0x80 0x80 0x80 0x80>;
-                       intel,gpi-routing = <0 0 0 0 0 0 0 2
-                                               1 0 0 0 0 0 0 0>;
-                       /* Enable EC SMI source */
-                       intel,alt-gp-smi-enable = <0x0100>;
-
-                       cros-ec@200 {
-                               compatible = "google,cros-ec";
-                               reg = <0x204 1 0x200 1 0x880 0x80>;
-
-                               /* Describes the flash memory within the EC */
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-                               flash@8000000 {
-                                       reg = <0x08000000 0x20000>;
-                                       erase-value = <0xff>;
-                               };
-                       };
-               };
-       };
-
-       microcode {
-               update@0 {
-#include "microcode/m12306a9_0000001b.dtsi"
-               };
-       };
-
-};
index f2cd75409e41e331c13eedb43c5d344e8d204c8e..981de1f0711aeda25ab1669181e7ac2ad38762d9 100644 (file)
@@ -13,14 +13,14 @@ comment "coreboot-specific options"
 
 config SYS_CONFIG_NAME
        string "Board configuration file"
-       default "coreboot"
+       default "chromebook_link"
        help
          This option selects the board configuration file in include/configs/
          directory to be used to build U-Boot for coreboot.
 
 config DEFAULT_DEVICE_TREE
        string "Board Device Tree Source (dts) file"
-       default "link"
+       default "chromebook_link"
        help
          This option selects the board Device Tree Source (dts) file in
          arch/x86/dts/ directory to be used to build U-Boot for coreboot.
index b83803e1d2ced81164e555d5b9a7338d788f61fa..e956835dc6d7ef39848388d3cbbc0c08ab60b22c 100644 (file)
@@ -6,5 +6,6 @@ CONFIG_OF_SEPARATE=y
 CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
 CONFIG_HAVE_MRC=y
 CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_VIDEO_X86=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
 CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
index 6249db7cb0cb0909cfd3129b8592719d8f392473..3cc034a98bbb7508cb95d722036ccb57782321f9 100644 (file)
@@ -2,4 +2,3 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x01110000"
 CONFIG_X86=y
 CONFIG_TARGET_COREBOOT=y
 CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="link"
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..fdbf3f64f28fee2479ab7dca441508858b430f1e 100644 (file)
@@ -0,0 +1,8 @@
+config VIDEO_X86
+       bool "Enable x86 video driver support"
+       depends on X86
+       default n
+       help
+         Turn on this option to enable a very simple driver which uses vesa
+         to discover the video mode and then provides a frame buffer for use
+         by U-Boot.
index 318f1a8fe767e53536a291bb2796f89de13d136f..e0bf3096f627805274c0159e440a0b1e6f36a814 100644 (file)
@@ -39,7 +39,6 @@
 
 #define CONFIG_X86_OPTION_ROM_FILE             pci8086,0166.bin
 #define CONFIG_X86_OPTION_ROM_ADDR             0xfff90000
-#define CONFIG_VIDEO_X86
 
 #define CONFIG_PCI_MEM_BUS     0xe0000000
 #define CONFIG_PCI_MEM_PHYS    CONFIG_PCI_MEM_BUS