drm/i915: Split the CDCLK retrieval per-platform

This is only going to get worse, so split it now to avoid adding more
cases to the if/else ladder.

Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index eb8e494ce569f0019b53be3180ade17ff4715c50..b5870fd920ff7021b838e2448dc725bd5af2799b 100644 (file)
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1192,31 +1192,52 @@ static void intel_disable_ddi(struct intel_encoder *intel_encoder)
        }
 }
 
-int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv)
+static int bdw_get_cdclk_freq(struct drm_i915_private *dev_priv)
+{
+       uint32_t lcpll = I915_READ(LCPLL_CTL);
+       uint32_t freq = lcpll & LCPLL_CLK_FREQ_MASK;
+
+       if (lcpll & LCPLL_CD_SOURCE_FCLK)
+               return 800000;
+       else if (I915_READ(FUSE_STRAP) & HSW_CDCLK_LIMIT)
+               return 450000;
+       else if (freq == LCPLL_CLK_FREQ_450)
+               return 450000;
+       else if (freq == LCPLL_CLK_FREQ_54O_BDW)
+               return 540000;
+       else if (freq == LCPLL_CLK_FREQ_337_5_BDW)
+               return 337500;
+       else
+               return 675000;
+}
+
+static int hsw_get_cdclk_freq(struct drm_i915_private *dev_priv)
 {
        struct drm_device *dev = dev_priv->dev;
        uint32_t lcpll = I915_READ(LCPLL_CTL);
        uint32_t freq = lcpll & LCPLL_CLK_FREQ_MASK;
 
-       if (lcpll & LCPLL_CD_SOURCE_FCLK) {
+       if (lcpll & LCPLL_CD_SOURCE_FCLK)
                return 800000;
-       } else if (I915_READ(FUSE_STRAP) & HSW_CDCLK_LIMIT) {
+       else if (I915_READ(FUSE_STRAP) & HSW_CDCLK_LIMIT)
                return 450000;
-       } else if (freq == LCPLL_CLK_FREQ_450) {
+       else if (freq == LCPLL_CLK_FREQ_450)
                return 450000;
-       } else if (IS_HASWELL(dev)) {
-               if (IS_ULT(dev))
-                       return 337500;
-               else
-                       return 540000;
-       } else {
-               if (freq == LCPLL_CLK_FREQ_54O_BDW)
-                       return 540000;
-               else if (freq == LCPLL_CLK_FREQ_337_5_BDW)
-                       return 337500;
-               else
-                       return 675000;
-       }
+       else if (IS_ULT(dev))
+               return 337500;
+       else
+               return 540000;
+}
+
+int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv)
+{
+       struct drm_device *dev = dev_priv->dev;
+
+       if (IS_BROADWELL(dev))
+               return bdw_get_cdclk_freq(dev_priv);
+
+       /* Haswell */
+       return hsw_get_cdclk_freq(dev_priv);
 }
 
 static void hsw_ddi_pll_enable(struct drm_i915_private *dev_priv,