#include <dm.h>
#include <fdtdec.h>
#include <malloc.h>
+#include <reset.h>
#include <spi.h>
#include <linux/errno.h>
#include "cadence_qspi.h"
{
struct cadence_spi_platdata *plat = bus->platdata;
struct cadence_spi_priv *priv = dev_get_priv(bus);
+ int ret;
priv->regbase = plat->regbase;
priv->ahbbase = plat->ahbbase;
+ ret = reset_get_bulk(bus, &priv->resets);
+ if (ret)
+ dev_warn(bus, "Can't get reset: %d\n", ret);
+ else
+ reset_deassert_bulk(&priv->resets);
+
if (!priv->qspi_is_init) {
cadence_qspi_apb_controller_init(plat);
priv->qspi_is_init = 1;
return 0;
}
+static int cadence_spi_remove(struct udevice *dev)
+{
+ struct cadence_spi_priv *priv = dev_get_priv(dev);
+
+ return reset_release_bulk(&priv->resets);
+}
+
static int cadence_spi_set_mode(struct udevice *bus, uint mode)
{
struct cadence_spi_priv *priv = dev_get_priv(bus);
.platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata),
.priv_auto_alloc_size = sizeof(struct cadence_spi_priv),
.probe = cadence_spi_probe,
+ .remove = cadence_spi_remove,
+ .flags = DM_FLAG_OS_PREPARE,
};
#ifndef __CADENCE_QSPI_H__
#define __CADENCE_QSPI_H__
+#include <reset.h>
+
#define CQSPI_IS_ADDR(cmd_len) (cmd_len > 1 ? 1 : 0)
#define CQSPI_NO_DECODER_MAX_CS 4
unsigned int qspi_calibrated_hz;
unsigned int qspi_calibrated_cs;
unsigned int previous_hz;
+
+ struct reset_ctl_bulk resets;
};
/* Functions call declaration */