--- /dev/null
+From c283782fc5d60c4d8169137c6f955aa3553d3b3d Mon Sep 17 00:00:00 2001
+From: Hui Wang <hui.wang@canonical.com>
+Date: Fri, 27 Sep 2024 19:46:10 +0800
+Subject: [PATCH] net: phy: realtek: Check the index value in
+ led_hw_control_get
+
+Just like rtl8211f_led_hw_is_supported() and
+rtl8211f_led_hw_control_set(), the rtl8211f_led_hw_control_get() also
+needs to check the index value, otherwise the caller is likely to get
+an incorrect rules.
+
+Fixes: 17784801d888 ("net: phy: realtek: Add support for PHY LEDs on RTL8211F")
+Signed-off-by: Hui Wang <hui.wang@canonical.com>
+Reviewed-by: Marek Vasut <marex@denx.de>
+Link: https://patch.msgid.link/20240927114610.1278935-1-hui.wang@canonical.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/phy/realtek.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -527,6 +527,9 @@ static int rtl8211f_led_hw_control_get(s
+ {
+ int val;
+
++ if (index >= RTL8211F_LED_COUNT)
++ return -EINVAL;
++
+ val = phy_read_paged(phydev, 0xd04, RTL8211F_LEDCR);
+ if (val < 0)
+ return val;
--- /dev/null
+From a6ad589c1d118f9d5b1bc4c6888d42919f830340 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1@gmail.com>
+Date: Mon, 7 Oct 2024 11:57:41 +0200
+Subject: [PATCH] net: phy: realtek: Fix MMD access on RTL8126A-integrated PHY
+
+All MMD reads return 0 for the RTL8126A-integrated PHY. Therefore phylib
+assumes it doesn't support EEE, what results in higher power consumption,
+and a significantly higher chip temperature in my case.
+To fix this split out the PHY driver for the RTL8126A-integrated PHY
+and set the read_mmd/write_mmd callbacks to read from vendor-specific
+registers.
+
+Fixes: 5befa3728b85 ("net: phy: realtek: add support for RTL8126A-integrated 5Gbps PHY")
+Cc: stable@vger.kernel.org
+Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/phy/realtek.c | 24 +++++++++++++++++++++++-
+ 1 file changed, 23 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -1081,6 +1081,16 @@ static int rtl8221b_vn_cg_c45_match_phy_
+ return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
+ }
+
++static int rtl8251b_c22_match_phy_device(struct phy_device *phydev)
++{
++ return rtlgen_is_c45_match(phydev, RTL_8251B, false);
++}
++
++static int rtl8251b_c45_match_phy_device(struct phy_device *phydev)
++{
++ return rtlgen_is_c45_match(phydev, RTL_8251B, true);
++}
++
+ static int rtlgen_resume(struct phy_device *phydev)
+ {
+ int ret = genphy_resume(phydev);
+@@ -1418,7 +1428,7 @@ static struct phy_driver realtek_drvs[]
+ .suspend = genphy_c45_pma_suspend,
+ .resume = rtlgen_c45_resume,
+ }, {
+- PHY_ID_MATCH_EXACT(0x001cc862),
++ .match_phy_device = rtl8251b_c45_match_phy_device,
+ .name = "RTL8251B 5Gbps PHY",
+ .get_features = rtl822x_get_features,
+ .config_aneg = rtl822x_config_aneg,
+@@ -1428,6 +1438,18 @@ static struct phy_driver realtek_drvs[]
+ .read_page = rtl821x_read_page,
+ .write_page = rtl821x_write_page,
+ }, {
++ .match_phy_device = rtl8251b_c22_match_phy_device,
++ .name = "RTL8126A-internal 5Gbps PHY",
++ .get_features = rtl822x_get_features,
++ .config_aneg = rtl822x_config_aneg,
++ .read_status = rtl822x_read_status,
++ .suspend = genphy_suspend,
++ .resume = rtlgen_resume,
++ .read_page = rtl821x_read_page,
++ .write_page = rtl821x_write_page,
++ .read_mmd = rtl822x_read_mmd,
++ .write_mmd = rtl822x_write_mmd,
++ }, {
+ PHY_ID_MATCH_EXACT(0x001ccad0),
+ .name = "RTL8224 2.5Gbps PHY",
+ .get_features = rtl822x_c45_get_features,
--- /dev/null
+From 081c9c0265c91b8333165aa6230c20bcbc6f7cbf Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Thu, 10 Oct 2024 14:07:16 +0100
+Subject: [PATCH 3/5] net: phy: realtek: read duplex and gbit master from PHYSR
+ register
+
+The PHYSR MMD register is present and defined equally for all RTL82xx
+Ethernet PHYs.
+Read duplex and Gbit master bits from rtlgen_decode_speed() and rename
+it to rtlgen_decode_physr().
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+Link: https://patch.msgid.link/b9a76341da851a18c985bc4774fa295babec79bb.1728565530.git.daniel@makrotopia.org
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+---
+ drivers/net/phy/realtek.c | 41 +++++++++++++++++++++++++++++++--------
+ 1 file changed, 33 insertions(+), 8 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -80,15 +80,18 @@
+
+ #define RTL822X_VND2_GANLPAR 0xa414
+
+-#define RTL822X_VND2_PHYSR 0xa434
+-
+ #define RTL8366RB_POWER_SAVE 0x15
+ #define RTL8366RB_POWER_SAVE_ON BIT(12)
+
+ #define RTL9000A_GINMR 0x14
+ #define RTL9000A_GINMR_LINK_STATUS BIT(4)
+
+-#define RTLGEN_SPEED_MASK 0x0630
++#define RTL_VND2_PHYSR 0xa434
++#define RTL_VND2_PHYSR_DUPLEX BIT(3)
++#define RTL_VND2_PHYSR_SPEEDL GENMASK(5, 4)
++#define RTL_VND2_PHYSR_SPEEDH GENMASK(10, 9)
++#define RTL_VND2_PHYSR_MASTER BIT(11)
++#define RTL_VND2_PHYSR_SPEED_MASK (RTL_VND2_PHYSR_SPEEDL | RTL_VND2_PHYSR_SPEEDH)
+
+ #define RTL_GENERIC_PHYID 0x001cc800
+ #define RTL_8211FVD_PHYID 0x001cc878
+@@ -660,9 +663,18 @@ static int rtl8366rb_config_init(struct
+ }
+
+ /* get actual speed to cover the downshift case */
+-static void rtlgen_decode_speed(struct phy_device *phydev, int val)
++static void rtlgen_decode_physr(struct phy_device *phydev, int val)
+ {
+- switch (val & RTLGEN_SPEED_MASK) {
++ /* bit 3
++ * 0: Half Duplex
++ * 1: Full Duplex
++ */
++ if (val & RTL_VND2_PHYSR_DUPLEX)
++ phydev->duplex = DUPLEX_FULL;
++ else
++ phydev->duplex = DUPLEX_HALF;
++
++ switch (val & RTL_VND2_PHYSR_SPEED_MASK) {
+ case 0x0000:
+ phydev->speed = SPEED_10;
+ break;
+@@ -684,6 +696,19 @@ static void rtlgen_decode_speed(struct p
+ default:
+ break;
+ }
++
++ /* bit 11
++ * 0: Slave Mode
++ * 1: Master Mode
++ */
++ if (phydev->speed >= 1000) {
++ if (val & RTL_VND2_PHYSR_MASTER)
++ phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER;
++ else
++ phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE;
++ } else {
++ phydev->master_slave_state = MASTER_SLAVE_STATE_UNSUPPORTED;
++ }
+ }
+
+ static int rtlgen_read_status(struct phy_device *phydev)
+@@ -701,7 +726,7 @@ static int rtlgen_read_status(struct phy
+ if (val < 0)
+ return val;
+
+- rtlgen_decode_speed(phydev, val);
++ rtlgen_decode_physr(phydev, val);
+
+ return 0;
+ }
+@@ -1007,11 +1032,11 @@ static int rtl822x_c45_read_status(struc
+ return 0;
+
+ /* Read actual speed from vendor register. */
+- val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_PHYSR);
++ val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
+ if (val < 0)
+ return val;
+
+- rtlgen_decode_speed(phydev, val);
++ rtlgen_decode_physr(phydev, val);
+
+ return 0;
+ }
--- /dev/null
+From 68d5cd09e8919679ce13b85950debea4b2e98e04 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Thu, 10 Oct 2024 14:07:26 +0100
+Subject: [PATCH 4/5] net: phy: realtek: change order of calls in C22
+ read_status()
+
+Always call rtlgen_read_status() first, so genphy_read_status() which
+is called by it clears bits in case auto-negotiation has not completed.
+Also clear 10GBT link-partner advertisement bits in case auto-negotiation
+is disabled or has not completed.
+
+Suggested-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+Link: https://patch.msgid.link/b15929a41621d215c6b2b57393368086589569ec.1728565530.git.daniel@makrotopia.org
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+---
+ drivers/net/phy/realtek.c | 22 +++++++++++++++-------
+ 1 file changed, 15 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -949,17 +949,25 @@ static void rtl822xb_update_interface(st
+
+ static int rtl822x_read_status(struct phy_device *phydev)
+ {
+- if (phydev->autoneg == AUTONEG_ENABLE) {
+- int lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
++ int lpadv, ret;
+
+- if (lpadv < 0)
+- return lpadv;
++ ret = rtlgen_read_status(phydev);
++ if (ret < 0)
++ return ret;
+
+- mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising,
+- lpadv);
++ if (phydev->autoneg == AUTONEG_DISABLE ||
++ !phydev->autoneg_complete) {
++ mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++ return 0;
+ }
+
+- return rtlgen_read_status(phydev);
++ lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
++ if (lpadv < 0)
++ return lpadv;
++
++ mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, lpadv);
++
++ return 0;
+ }
+
+ static int rtl822xb_read_status(struct phy_device *phydev)
--- /dev/null
+From 5cb409b3960e75467cbb0a8e1e5596b4490570e3 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Thu, 10 Oct 2024 14:07:39 +0100
+Subject: [PATCH 5/5] net: phy: realtek: clear 1000Base-T link partner
+ advertisement
+
+Clear 1000Base-T link partner advertisement bits in Clause-45
+read_status() function in case auto-negotiation is disabled or has not
+been completed.
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+Link: https://patch.msgid.link/9dc9b47b2d675708afef3ad366bfd78eb584d958.1728565530.git.daniel@makrotopia.org
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+---
+ drivers/net/phy/realtek.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -1026,6 +1026,10 @@ static int rtl822x_c45_read_status(struc
+ if (ret < 0)
+ return ret;
+
++ if (phydev->autoneg == AUTONEG_DISABLE ||
++ !genphy_c45_aneg_done(phydev))
++ mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++
+ /* Vendor register as C45 has no standardized support for 1000BaseT */
+ if (phydev->autoneg == AUTONEG_ENABLE) {
+ val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
-@@ -1325,6 +1325,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1375,6 +1375,7 @@ static struct phy_driver realtek_drvs[]
}, {
.name = "RTL8226 2.5Gbps PHY",
.match_phy_device = rtl8226_match_phy_device,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.read_status = rtl822x_read_status,
-@@ -1337,6 +1338,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1387,6 +1388,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc840),
.name = "RTL8226B_RTL8221B 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
-@@ -1351,6 +1353,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1401,6 +1403,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc838),
.name = "RTL8226-CG 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.read_status = rtl822x_read_status,
-@@ -1361,6 +1364,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1411,6 +1414,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc848),
.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
-@@ -1373,6 +1377,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1423,6 +1427,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
-@@ -1385,6 +1390,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1435,6 +1440,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,
-@@ -1395,6 +1401,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1445,6 +1451,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
-@@ -1407,6 +1414,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1457,6 +1464,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
-@@ -786,8 +786,8 @@ static int rtl822x_write_mmd(struct phy_
+@@ -814,8 +814,8 @@ static int rtl822x_write_mmd(struct phy_
static int rtl822xb_config_init(struct phy_device *phydev)
{
bool has_2500, has_sgmii;
has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
phydev->host_interfaces) ||
-@@ -837,7 +837,29 @@ static int rtl822xb_config_init(struct p
+@@ -865,7 +865,29 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
-@@ -1052,9 +1052,11 @@ static bool rtlgen_supports_2_5gbps(stru
+@@ -1092,9 +1092,11 @@ static bool rtlgen_supports_2_5gbps(stru
{
int val;
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
-@@ -82,6 +82,10 @@
+@@ -80,6 +80,10 @@
- #define RTL822X_VND2_PHYSR 0xa434
+ #define RTL822X_VND2_GANLPAR 0xa414
+#define RTL8221B_PHYCR1 0xa430
+#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
-@@ -1102,6 +1106,25 @@ static int rtl8221b_vn_cg_c45_match_phy_
- return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
+@@ -1152,6 +1156,25 @@ static int rtl8251b_c45_match_phy_device
+ return rtlgen_is_c45_match(phydev, RTL_8251B, true);
}
+static int rtl822x_probe(struct phy_device *phydev)
static int rtlgen_resume(struct phy_device *phydev)
{
int ret = genphy_resume(phydev);
-@@ -1377,6 +1400,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1427,6 +1450,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc838),
.name = "RTL8226-CG 2.5Gbps PHY",
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
-@@ -1388,6 +1412,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1438,6 +1462,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc848),
.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
-@@ -1401,6 +1426,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1451,6 +1476,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
-@@ -1414,6 +1440,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1464,6 +1490,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
.soft_reset = genphy_soft_reset,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
-@@ -1425,6 +1452,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1475,6 +1502,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
-@@ -1438,6 +1466,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1488,6 +1516,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
-@@ -1080,10 +1080,32 @@ static int rtl8226_match_phy_device(stru
+@@ -1120,10 +1120,32 @@ static int rtl8226_match_phy_device(stru
static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
bool is_c45)
{
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
-@@ -1282,6 +1282,51 @@ static irqreturn_t rtl9000a_handle_inter
+@@ -1332,6 +1332,51 @@ static irqreturn_t rtl9000a_handle_inter
return IRQ_HANDLED;
}
static struct phy_driver realtek_drvs[] = {
{
PHY_ID_MATCH_EXACT(0x00008201),
-@@ -1448,6 +1493,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1498,6 +1543,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
.probe = rtl822x_probe,
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
-@@ -1462,6 +1509,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1512,6 +1559,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
.probe = rtl822x_probe,
.soft_reset = genphy_soft_reset,
.config_init = rtl822xb_config_init,
-@@ -1474,6 +1523,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1524,6 +1573,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
.probe = rtl822x_probe,
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
-@@ -1488,6 +1539,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1538,6 +1589,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
+++ /dev/null
-From 66d82d3f04623e9c096e12c10ca51141c345ee84 Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel@makrotopia.org>
-Date: Tue, 8 Oct 2024 20:59:51 +0100
-Subject: [PATCH] net: phy: realtek: read duplex and gbit master from PHYSR
- register
-
-The PHYSR MMD register is present and defined equally for all RTL82xx
-Ethernet PHYs.
-Read duplex and gbit master bits from rtlgen_decode_speed() and rename
-it to rtlgen_decode_physr().
-
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
----
- drivers/net/phy/realtek.c | 48 ++++++++++++++++++++++++++++++++-------
- 1 file changed, 40 insertions(+), 8 deletions(-)
-
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -80,20 +80,24 @@
-
- #define RTL822X_VND2_GANLPAR 0xa414
-
--#define RTL822X_VND2_PHYSR 0xa434
--
- #define RTL8221B_PHYCR1 0xa430
- #define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
- #define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12)
-
-+#define RTL_VND2_PHYSR 0xa434
-+#define RTL_VND2_PHYSR_LINK BIT(2)
-+#define RTL_VND2_PHYSR_DUPLEX BIT(3)
-+#define RTL_VND2_PHYSR_SPEEDL GENMASK(5, 4)
-+#define RTL_VND2_PHYSR_SPEEDH GENMASK(10, 9)
-+#define RTL_VND2_PHYSR_MASTER BIT(11)
-+#define RTL_VND2_PHYSR_SPEED_MASK (RTL_VND2_PHYSR_SPEEDL | RTL_VND2_PHYSR_SPEEDH)
-+
- #define RTL8366RB_POWER_SAVE 0x15
- #define RTL8366RB_POWER_SAVE_ON BIT(12)
-
- #define RTL9000A_GINMR 0x14
- #define RTL9000A_GINMR_LINK_STATUS BIT(4)
-
--#define RTLGEN_SPEED_MASK 0x0630
--
- #define RTL_GENERIC_PHYID 0x001cc800
- #define RTL_8211FVD_PHYID 0x001cc878
- #define RTL_8221B_VB_CG 0x001cc849
-@@ -661,9 +665,24 @@ static int rtl8366rb_config_init(struct
- }
-
- /* get actual speed to cover the downshift case */
--static void rtlgen_decode_speed(struct phy_device *phydev, int val)
-+static void rtlgen_decode_physr(struct phy_device *phydev, int val)
- {
-- switch (val & RTLGEN_SPEED_MASK) {
-+ /* bit 2
-+ * 0: Link not OK
-+ * 1: Link OK
-+ */
-+ phydev->link = !!(val & RTL_VND2_PHYSR_LINK);
-+
-+ /* bit 3
-+ * 0: Half Duplex
-+ * 1: Full Duplex
-+ */
-+ if (val & RTL_VND2_PHYSR_DUPLEX)
-+ phydev->duplex = DUPLEX_FULL;
-+ else
-+ phydev->duplex = DUPLEX_HALF;
-+
-+ switch (val & RTL_VND2_PHYSR_SPEED_MASK) {
- case 0x0000:
- phydev->speed = SPEED_10;
- break;
-@@ -685,6 +704,19 @@ static void rtlgen_decode_speed(struct p
- default:
- break;
- }
-+
-+ /* bit 11
-+ * 0: Slave Mode
-+ * 1: Master Mode
-+ */
-+ if (phydev->speed >= 1000) {
-+ if (val & RTL_VND2_PHYSR_MASTER)
-+ phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER;
-+ else
-+ phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE;
-+ } else {
-+ phydev->master_slave_state = MASTER_SLAVE_STATE_UNSUPPORTED;
-+ }
- }
-
- static int rtlgen_read_status(struct phy_device *phydev)
-@@ -702,7 +734,7 @@ static int rtlgen_read_status(struct phy
- if (val < 0)
- return val;
-
-- rtlgen_decode_speed(phydev, val);
-+ rtlgen_decode_physr(phydev, val);
-
- return 0;
- }
-@@ -1030,11 +1062,11 @@ static int rtl822x_c45_read_status(struc
- return 0;
-
- /* Read actual speed from vendor register. */
-- val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_PHYSR);
-+ val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
- if (val < 0)
- return val;
-
-- rtlgen_decode_speed(phydev, val);
-+ rtlgen_decode_physr(phydev, val);
-
- return 0;
- }
+++ /dev/null
-From eaca24de0c0e64145c130759207da32594d2e5d1 Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel@makrotopia.org>
-Date: Tue, 8 Oct 2024 21:05:47 +0100
-Subject: [PATCH 2/3] net: phy: realtek: change order of calls in C22
- read_status()
-
-Always call rtlgen_read_status() first, so genphy_read_status() which
-is called by it clears bits in case auto-negotiation has not completed.
-Also clear 10GBT link-partner advertisement bits in case auto-negotiation
-is disabled or has not completed.
-
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
----
- drivers/net/phy/realtek.c | 22 +++++++++++++++-------
- 1 file changed, 15 insertions(+), 7 deletions(-)
-
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -979,17 +979,25 @@ static void rtl822xb_update_interface(st
-
- static int rtl822x_read_status(struct phy_device *phydev)
- {
-- if (phydev->autoneg == AUTONEG_ENABLE) {
-- int lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
-+ int lpadv, ret;
-
-- if (lpadv < 0)
-- return lpadv;
-+ ret = rtlgen_read_status(phydev);
-+ if (ret < 0)
-+ return ret;
-
-- mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising,
-- lpadv);
-+ if (phydev->autoneg == AUTONEG_DISABLE ||
-+ !phydev->autoneg_complete) {
-+ mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
-+ return 0;
- }
-
-- return rtlgen_read_status(phydev);
-+ lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
-+ if (lpadv < 0)
-+ return lpadv;
-+
-+ mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, lpadv);
-+
-+ return 0;
- }
-
- static int rtl822xb_read_status(struct phy_device *phydev)
+++ /dev/null
-From 8b137d1e405dc90300ba577db44c70f0e026636e Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel@makrotopia.org>
-Date: Tue, 8 Oct 2024 21:09:19 +0100
-Subject: [PATCH 3/3] net: phy: realtek: clear 1000Base-T link partner
- advertisement
-
-Clear 1000Base-T link partner advertisement bits in Clause-45
-read_status() function in case auto-negotiation is disabled or has not
-been completed.
-
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
----
- drivers/net/phy/realtek.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -1056,6 +1056,10 @@ static int rtl822x_c45_read_status(struc
- if (ret < 0)
- return ret;
-
-+ if (phydev->autoneg == AUTONEG_DISABLE ||
-+ !genphy_c45_aneg_done(phydev))
-+ mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
-+
- /* Vendor register as C45 has no standardized support for 1000BaseT */
- if (phydev->autoneg == AUTONEG_ENABLE) {
- val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
projects / openwrt / staging / pepe2k.git / commitdiff