PSCI: Fix MISRA defects in stat code
authorAntonio Nino Diaz <antonio.ninodiaz@arm.com>
Wed, 18 Jul 2018 15:21:11 +0000 (16:21 +0100)
committerAntonio Nino Diaz <antonio.ninodiaz@arm.com>
Tue, 24 Jul 2018 08:19:26 +0000 (09:19 +0100)
MISRA C-2012 Rules 10.1, 10.3 and 20.7.

Change-Id: I972ce63f0d8fa157ed17e826b84f218fe498c517
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
lib/psci/psci_stat.c

index e925d34edda8189da7f6f38963687ea57341ef5c..421db4430bad0769986c7a2444c6584fb4106b0a 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -11,7 +11,7 @@
 #include "psci_private.h"
 
 #ifndef PLAT_MAX_PWR_LVL_STATES
-#define PLAT_MAX_PWR_LVL_STATES 2
+#define PLAT_MAX_PWR_LVL_STATES                2U
 #endif
 
 /* Following structure is used for PSCI STAT */
@@ -25,7 +25,7 @@ typedef struct psci_stat {
  * that goes to power down in non cpu power domains.
  */
 static int last_cpu_in_non_cpu_pd[PSCI_NUM_NON_CPU_PWR_DOMAINS] = {
-               [0 ... PSCI_NUM_NON_CPU_PWR_DOMAINS-1] = -1};
+               [0 ... PSCI_NUM_NON_CPU_PWR_DOMAINS - 1] = -1};
 
 /*
  * Following are used to store PSCI STAT values for
@@ -41,21 +41,21 @@ static psci_stat_t psci_non_cpu_stat[PSCI_NUM_NON_CPU_PWR_DOMAINS]
  * local power state and power domain level. If the platform implements the
  * `get_pwr_lvl_state_idx` pm hook, then that will be used to return the index.
  */
-static int get_stat_idx(plat_local_state_t local_state, int pwr_lvl)
+static int get_stat_idx(plat_local_state_t local_state, unsigned int pwr_lvl)
 {
        int idx;
 
        if (psci_plat_pm_ops->get_pwr_lvl_state_idx == NULL) {
-               assert(PLAT_MAX_PWR_LVL_STATES == 2);
-               if (is_local_state_retn(local_state))
+               assert(PLAT_MAX_PWR_LVL_STATES == 2U);
+               if (is_local_state_retn(local_state) != 0)
                        return 0;
 
-               assert(is_local_state_off(local_state));
+               assert(is_local_state_off(local_state) != 0);
                return 1;
        }
 
        idx = psci_plat_pm_ops->get_pwr_lvl_state_idx(local_state, pwr_lvl);
-       assert((idx >= 0) && (idx < PLAT_MAX_PWR_LVL_STATES));
+       assert((idx >= 0) && (idx < (int) PLAT_MAX_PWR_LVL_STATES));
        return idx;
 }
 
@@ -73,17 +73,18 @@ static int get_stat_idx(plat_local_state_t local_state, int pwr_lvl)
 void psci_stats_update_pwr_down(unsigned int end_pwrlvl,
                        const psci_power_state_t *state_info)
 {
-       unsigned int lvl, parent_idx, cpu_idx = plat_my_core_pos();
+       unsigned int lvl, parent_idx;
+       int cpu_idx = (int) plat_my_core_pos();
 
        assert(end_pwrlvl <= PLAT_MAX_PWR_LVL);
-       assert(state_info);
+       assert(state_info != NULL);
 
        parent_idx = psci_cpu_pd_nodes[cpu_idx].parent_node;
 
-       for (lvl = PSCI_CPU_PWR_LVL + 1; lvl <= end_pwrlvl; lvl++) {
+       for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) {
 
                /* Break early if the target power state is RUN */
-               if (is_local_state_run(state_info->pwr_domain_state[lvl]))
+               if (is_local_state_run(state_info->pwr_domain_state[lvl]) != 0)
                        break;
 
                /*
@@ -105,13 +106,14 @@ void psci_stats_update_pwr_down(unsigned int end_pwrlvl,
 void psci_stats_update_pwr_up(unsigned int end_pwrlvl,
                        const psci_power_state_t *state_info)
 {
-       unsigned int lvl, parent_idx, cpu_idx = plat_my_core_pos();
+       unsigned int lvl, parent_idx;
+       int cpu_idx = (int) plat_my_core_pos();
        int stat_idx;
        plat_local_state_t local_state;
        u_register_t residency;
 
        assert(end_pwrlvl <= PLAT_MAX_PWR_LVL);
-       assert(state_info);
+       assert(state_info != NULL);
 
        /* Get the index into the stats array */
        local_state = state_info->pwr_domain_state[PSCI_CPU_PWR_LVL];
@@ -134,9 +136,9 @@ void psci_stats_update_pwr_up(unsigned int end_pwrlvl,
        if (last_cpu_in_non_cpu_pd[parent_idx] == -1)
                return;
 
-       for (lvl = PSCI_CPU_PWR_LVL + 1; lvl <= end_pwrlvl; lvl++) {
+       for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) {
                local_state = state_info->pwr_domain_state[lvl];
-               if (is_local_state_run(local_state)) {
+               if (is_local_state_run(local_state) != 0) {
                        /* Break early */
                        break;
                }
@@ -145,7 +147,7 @@ void psci_stats_update_pwr_up(unsigned int end_pwrlvl,
 
                /* Call into platform interface to calculate residency. */
                residency = plat_psci_stat_get_residency(lvl, state_info,
-                   last_cpu_in_non_cpu_pd[parent_idx]);
+                                       last_cpu_in_non_cpu_pd[parent_idx]);
 
                /* Initialize back to reset value */
                last_cpu_in_non_cpu_pd[parent_idx] = -1;
@@ -171,17 +173,18 @@ static int psci_get_stat(u_register_t target_cpu, unsigned int power_state,
                         psci_stat_t *psci_stat)
 {
        int rc;
-       unsigned int pwrlvl, lvl, parent_idx, stat_idx, target_idx;
+       unsigned int pwrlvl, lvl, parent_idx, target_idx;
+       int stat_idx;
        psci_power_state_t state_info = { {PSCI_LOCAL_STATE_RUN} };
        plat_local_state_t local_state;
 
        /* Validate the target_cpu parameter and determine the cpu index */
-       target_idx = plat_core_pos_by_mpidr(target_cpu);
-       if (target_idx == -1)
+       target_idx = (unsigned int) plat_core_pos_by_mpidr(target_cpu);
+       if (target_idx == (unsigned int) -1)
                return PSCI_E_INVALID_PARAMS;
 
        /* Validate the power_state parameter */
-       if (!psci_plat_pm_ops->translate_power_state_by_mpidr)
+       if (psci_plat_pm_ops->translate_power_state_by_mpidr == NULL)
                rc = psci_validate_power_state(power_state, &state_info);
        else
                rc = psci_plat_pm_ops->translate_power_state_by_mpidr(
@@ -204,7 +207,7 @@ static int psci_get_stat(u_register_t target_cpu, unsigned int power_state,
        if (pwrlvl > PSCI_CPU_PWR_LVL) {
                /* Get the power domain index */
                parent_idx = psci_cpu_pd_nodes[target_idx].parent_node;
-               for (lvl = PSCI_CPU_PWR_LVL + 1; lvl < pwrlvl; lvl++)
+               for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl < pwrlvl; lvl++)
                        parent_idx = psci_non_cpu_pd_nodes[parent_idx].parent_node;
 
                /* Get the non cpu power domain stats */