The pins for async memory where parallel flash lives are not enabled by
default, so make sure we mux them as needed.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
return 0;
}
+
+int board_early_init_f(void)
+{
+#if !defined(CONFIG_SYS_NO_FLASH)
+ /* setup BF518-EZBRD GPIO pin PG11 to AMS2. */
+ bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_6_MASK) | PORT_x_MUX_6_FUNC_2);
+ bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG11);
+
+# if !defined(CONFIG_BFIN_SPI)
+ /* setup BF518-EZBRD GPIO pin PG15 to AMS3. */
+ bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_7_MASK) | PORT_x_MUX_7_FUNC_3);
+ bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG15);
+# endif
+#endif
+ return 0;
+}
/*
* Misc Settings
*/
+#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE 0