Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong.
This device is similar to the NanoPi R2S, and has a 16MB
SPI NOR (mx25l12805d). The reset button is changed to
directly reset the power supply, another detail is that
both network ports have independent MAC addresses.
Note: booting from SPI is currently unsupported, you have to install
the image on a SD card.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
case $board in
friendlyarm,nanopi-r2c|\
friendlyarm,nanopi-r2s|\
-friendlyarm,nanopi-r4s)
+friendlyarm,nanopi-r4s|\
+xunlong,orangepi-r1-plus)
ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0"
ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth1"
;;
case "$board" in
friendlyarm,nanopi-r2s|\
- friendlyarm,nanopi-r4s)
+ friendlyarm,nanopi-r4s|\
+ xunlong,orangepi-r1-plus)
ucidef_set_interfaces_lan_wan 'eth1' 'eth0'
;;
*)
wan_mac=$(nanopi_r4s_get_mac wan)
lan_mac=$(nanopi_r4s_get_mac lan)
;;
+ xunlong,orangepi-r1-plus)
+ wan_mac=$(macaddr_add "$(cat /sys/class/net/eth1/address)" -1)
+ ;;
esac
[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
case "$(board_name)" in
friendlyarm,nanopi-r2c|\
-friendlyarm,nanopi-r2s)
+friendlyarm,nanopi-r2s|\
+xunlong,orangepi-r1-plus)
set_interface_core 2 "eth0"
set_interface_core 4 "eth1" "xhci-hcd:usb3"
;;
IMAGE/sysupgrade.img.gz := boot-common | boot-script | pine64-img | gzip | append-metadata
endef
TARGET_DEVICES += radxa_rock-pi-4a
+
+define Device/xunlong_orangepi-r1-plus
+ DEVICE_VENDOR := Xunlong
+ DEVICE_MODEL := Orange Pi R1 Plus
+ SOC := rk3328
+ IMAGE/sysupgrade.img.gz := boot-common | boot-script | pine64-img | gzip | append-metadata
+ DEVICE_PACKAGES := kmod-usb-net-rtl8152
+endef
+TARGET_DEVICES += xunlong_orangepi-r1-plus
--- /dev/null
+From 51712e1d014aaaa4c6e1e7e84932d58b5c0f59ed Mon Sep 17 00:00:00 2001
+From: Chukun Pan <amadeus@jmu.edu.cn>
+Date: Sat, 3 Dec 2022 15:41:49 +0800
+Subject: [PATCH] arm64: dts: rockchip: rk3328: Add Orange Pi R1 Plus
+
+Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong.
+
+This device is similar to the NanoPi R2S, and has a 16MB
+SPI NOR (mx25l12805d). The reset button is changed to
+directly reset the power supply, another detail is that
+both network ports have independent MAC addresses.
+
+Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
+Link: https://lore.kernel.org/r/20221203074149.11543-3-amadeus@jmu.edu.cn
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/Makefile | 1 +
+ .../dts/rockchip/rk3328-orangepi-r1-plus.dts | 373 ++++++++++++++++++
+ 2 files changed, 374 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
+
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
+@@ -0,0 +1,373 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Based on rk3328-nanopi-r2s.dts, which is:
++ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
++ */
++
++/dts-v1/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/leds/common.h>
++#include "rk3328.dtsi"
++
++/ {
++ model = "Xunlong Orange Pi R1 Plus";
++ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328";
++
++ aliases {
++ ethernet1 = &rtl8153;
++ mmc0 = &sdmmc;
++ };
++
++ chosen {
++ stdout-path = "serial2:1500000n8";
++ };
++
++ gmac_clk: gmac-clock {
++ compatible = "fixed-clock";
++ clock-frequency = <125000000>;
++ clock-output-names = "gmac_clkin";
++ #clock-cells = <0>;
++ };
++
++ leds {
++ compatible = "gpio-leds";
++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
++ pinctrl-names = "default";
++
++ led-0 {
++ function = LED_FUNCTION_LAN;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
++ };
++
++ led-1 {
++ function = LED_FUNCTION_STATUS;
++ color = <LED_COLOR_ID_RED>;
++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ };
++
++ led-2 {
++ function = LED_FUNCTION_WAN;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
++ };
++ };
++
++ vcc_sd: sdmmc-regulator {
++ compatible = "regulator-fixed";
++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
++ pinctrl-0 = <&sdmmc0m1_pin>;
++ pinctrl-names = "default";
++ regulator-name = "vcc_sd";
++ regulator-boot-on;
++ vin-supply = <&vcc_io>;
++ };
++
++ vcc_sys: vcc-sys-regulator {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc_sys";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ };
++
++ vdd_5v_lan: vdd-5v-lan-regulator {
++ compatible = "regulator-fixed";
++ enable-active-high;
++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
++ pinctrl-0 = <&lan_vdd_pin>;
++ pinctrl-names = "default";
++ regulator-name = "vdd_5v_lan";
++ regulator-always-on;
++ regulator-boot-on;
++ vin-supply = <&vcc_sys>;
++ };
++};
++
++&cpu0 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&cpu1 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&cpu2 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&cpu3 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&display_subsystem {
++ status = "disabled";
++};
++
++&gmac2io {
++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
++ clock_in_out = "input";
++ phy-handle = <&rtl8211e>;
++ phy-mode = "rgmii";
++ phy-supply = <&vcc_io>;
++ pinctrl-0 = <&rgmiim1_pins>;
++ pinctrl-names = "default";
++ snps,aal;
++ rx_delay = <0x18>;
++ tx_delay = <0x24>;
++ status = "okay";
++
++ mdio {
++ compatible = "snps,dwmac-mdio";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ rtl8211e: ethernet-phy@1 {
++ reg = <1>;
++ pinctrl-0 = <ð_phy_reset_pin>;
++ pinctrl-names = "default";
++ reset-assert-us = <10000>;
++ reset-deassert-us = <50000>;
++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
++ };
++ };
++};
++
++&i2c1 {
++ status = "okay";
++
++ rk805: pmic@18 {
++ compatible = "rockchip,rk805";
++ reg = <0x18>;
++ interrupt-parent = <&gpio1>;
++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
++ #clock-cells = <1>;
++ clock-output-names = "xin32k", "rk805-clkout2";
++ gpio-controller;
++ #gpio-cells = <2>;
++ pinctrl-0 = <&pmic_int_l>;
++ pinctrl-names = "default";
++ rockchip,system-power-controller;
++ wakeup-source;
++
++ vcc1-supply = <&vcc_sys>;
++ vcc2-supply = <&vcc_sys>;
++ vcc3-supply = <&vcc_sys>;
++ vcc4-supply = <&vcc_sys>;
++ vcc5-supply = <&vcc_io>;
++ vcc6-supply = <&vcc_sys>;
++
++ regulators {
++ vdd_log: DCDC_REG1 {
++ regulator-name = "vdd_log";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <712500>;
++ regulator-max-microvolt = <1450000>;
++ regulator-ramp-delay = <12500>;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1000000>;
++ };
++ };
++
++ vdd_arm: DCDC_REG2 {
++ regulator-name = "vdd_arm";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <712500>;
++ regulator-max-microvolt = <1450000>;
++ regulator-ramp-delay = <12500>;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <950000>;
++ };
++ };
++
++ vcc_ddr: DCDC_REG3 {
++ regulator-name = "vcc_ddr";
++ regulator-always-on;
++ regulator-boot-on;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ };
++ };
++
++ vcc_io: DCDC_REG4 {
++ regulator-name = "vcc_io";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <3300000>;
++ };
++ };
++
++ vcc_18: LDO_REG1 {
++ regulator-name = "vcc_18";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1800000>;
++ };
++ };
++
++ vcc18_emmc: LDO_REG2 {
++ regulator-name = "vcc18_emmc";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1800000>;
++ };
++ };
++
++ vdd_10: LDO_REG3 {
++ regulator-name = "vdd_10";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1000000>;
++ regulator-max-microvolt = <1000000>;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1000000>;
++ };
++ };
++ };
++ };
++};
++
++&io_domains {
++ pmuio-supply = <&vcc_io>;
++ vccio1-supply = <&vcc_io>;
++ vccio2-supply = <&vcc18_emmc>;
++ vccio3-supply = <&vcc_io>;
++ vccio4-supply = <&vcc_io>;
++ vccio5-supply = <&vcc_io>;
++ vccio6-supply = <&vcc_io>;
++ status = "okay";
++};
++
++&pinctrl {
++ gmac2io {
++ eth_phy_reset_pin: eth-phy-reset-pin {
++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
++ };
++ };
++
++ leds {
++ lan_led_pin: lan-led-pin {
++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ sys_led_pin: sys-led-pin {
++ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ wan_led_pin: wan-led-pin {
++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ lan {
++ lan_vdd_pin: lan-vdd-pin {
++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ pmic {
++ pmic_int_l: pmic-int-l {
++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
++ };
++ };
++};
++
++&pwm2 {
++ status = "okay";
++};
++
++&sdmmc {
++ bus-width = <4>;
++ cap-sd-highspeed;
++ disable-wp;
++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
++ pinctrl-names = "default";
++ vmmc-supply = <&vcc_sd>;
++ status = "okay";
++};
++
++&spi0 {
++ status = "okay";
++
++ flash@0 {
++ compatible = "jedec,spi-nor";
++ reg = <0>;
++ spi-max-frequency = <50000000>;
++ };
++};
++
++&tsadc {
++ rockchip,hw-tshut-mode = <0>;
++ rockchip,hw-tshut-polarity = <0>;
++ status = "okay";
++};
++
++&u2phy {
++ status = "okay";
++};
++
++&u2phy_host {
++ status = "okay";
++};
++
++&u2phy_otg {
++ status = "okay";
++};
++
++&uart2 {
++ status = "okay";
++};
++
++&usb20_otg {
++ dr_mode = "host";
++ status = "okay";
++};
++
++&usbdrd3 {
++ dr_mode = "host";
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ /* Second port is for USB 3.0 */
++ rtl8153: device@2 {
++ compatible = "usbbda,8153";
++ reg = <2>;
++ };
++};
++
++&usb_host0_ehci {
++ status = "okay";
++};
++
++&usb_host0_ohci {
++ status = "okay";
++};
--- /dev/null
+From d2166e3b3680bd2b206aebf1e1ce4c0d346f3c50 Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Fri, 19 May 2023 12:10:52 +0800
+Subject: [PATCH] arm64: dts: rockchip: Update LED properties for Orange Pi R1
+ Plus
+
+Add OpenWrt's LED aliases for showing system status.
+Also replace function/color with legacy label as OpenWrt relys on it
+to update LED settings.
+
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+---
+ .../dts/rockchip/rk3328-orangepi-r1-plus.dts | 17 +++++++++--------
+ 1 file changed, 9 insertions(+), 8 deletions(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
+@@ -17,6 +17,11 @@
+ aliases {
+ ethernet1 = &rtl8153;
+ mmc0 = &sdmmc;
++
++ led-boot = &status_led;
++ led-failsafe = &status_led;
++ led-running = &status_led;
++ led-upgrade = &status_led;
+ };
+
+ chosen {
+@@ -36,22 +41,18 @@
+ pinctrl-names = "default";
+
+ led-0 {
+- function = LED_FUNCTION_LAN;
+- color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
++ label = "green:lan";
+ };
+
+- led-1 {
+- function = LED_FUNCTION_STATUS;
+- color = <LED_COLOR_ID_RED>;
++ status_led: led-1 {
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+- linux,default-trigger = "heartbeat";
++ label = "red:status";
+ };
+
+ led-2 {
+- function = LED_FUNCTION_WAN;
+- color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
++ label = "green:wan";
+ };
+ };
+
--- /dev/null
+From b46a530d12ada422b9d5b2b97059e0d3ed950b40 Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Fri, 19 May 2023 12:38:04 +0800
+Subject: [PATCH] arm64: dts: rockchip: add LED configuration to Orange Pi R1
+ Plus
+
+Add the correct value for the RTL8153 LED configuration register to
+match the blink behavior of the other port on the device.
+
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+---
+ arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
+@@ -362,6 +362,7 @@
+ rtl8153: device@2 {
+ compatible = "usbbda,8153";
+ reg = <2>;
++ realtek,led-data = <0x87>;
+ };
+ };
+
--- /dev/null
+From 51712e1d014aaaa4c6e1e7e84932d58b5c0f59ed Mon Sep 17 00:00:00 2001
+From: Chukun Pan <amadeus@jmu.edu.cn>
+Date: Sat, 3 Dec 2022 15:41:49 +0800
+Subject: [PATCH] arm64: dts: rockchip: rk3328: Add Orange Pi R1 Plus
+
+Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong.
+
+This device is similar to the NanoPi R2S, and has a 16MB
+SPI NOR (mx25l12805d). The reset button is changed to
+directly reset the power supply, another detail is that
+both network ports have independent MAC addresses.
+
+Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
+Link: https://lore.kernel.org/r/20221203074149.11543-3-amadeus@jmu.edu.cn
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/Makefile | 1 +
+ .../dts/rockchip/rk3328-orangepi-r1-plus.dts | 373 ++++++++++++++++++
+ 2 files changed, 374 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
+
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
+@@ -0,0 +1,373 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Based on rk3328-nanopi-r2s.dts, which is:
++ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
++ */
++
++/dts-v1/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/leds/common.h>
++#include "rk3328.dtsi"
++
++/ {
++ model = "Xunlong Orange Pi R1 Plus";
++ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328";
++
++ aliases {
++ ethernet1 = &rtl8153;
++ mmc0 = &sdmmc;
++ };
++
++ chosen {
++ stdout-path = "serial2:1500000n8";
++ };
++
++ gmac_clk: gmac-clock {
++ compatible = "fixed-clock";
++ clock-frequency = <125000000>;
++ clock-output-names = "gmac_clkin";
++ #clock-cells = <0>;
++ };
++
++ leds {
++ compatible = "gpio-leds";
++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
++ pinctrl-names = "default";
++
++ led-0 {
++ function = LED_FUNCTION_LAN;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
++ };
++
++ led-1 {
++ function = LED_FUNCTION_STATUS;
++ color = <LED_COLOR_ID_RED>;
++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ };
++
++ led-2 {
++ function = LED_FUNCTION_WAN;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
++ };
++ };
++
++ vcc_sd: sdmmc-regulator {
++ compatible = "regulator-fixed";
++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
++ pinctrl-0 = <&sdmmc0m1_pin>;
++ pinctrl-names = "default";
++ regulator-name = "vcc_sd";
++ regulator-boot-on;
++ vin-supply = <&vcc_io>;
++ };
++
++ vcc_sys: vcc-sys-regulator {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc_sys";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ };
++
++ vdd_5v_lan: vdd-5v-lan-regulator {
++ compatible = "regulator-fixed";
++ enable-active-high;
++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
++ pinctrl-0 = <&lan_vdd_pin>;
++ pinctrl-names = "default";
++ regulator-name = "vdd_5v_lan";
++ regulator-always-on;
++ regulator-boot-on;
++ vin-supply = <&vcc_sys>;
++ };
++};
++
++&cpu0 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&cpu1 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&cpu2 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&cpu3 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&display_subsystem {
++ status = "disabled";
++};
++
++&gmac2io {
++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
++ clock_in_out = "input";
++ phy-handle = <&rtl8211e>;
++ phy-mode = "rgmii";
++ phy-supply = <&vcc_io>;
++ pinctrl-0 = <&rgmiim1_pins>;
++ pinctrl-names = "default";
++ snps,aal;
++ rx_delay = <0x18>;
++ tx_delay = <0x24>;
++ status = "okay";
++
++ mdio {
++ compatible = "snps,dwmac-mdio";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ rtl8211e: ethernet-phy@1 {
++ reg = <1>;
++ pinctrl-0 = <ð_phy_reset_pin>;
++ pinctrl-names = "default";
++ reset-assert-us = <10000>;
++ reset-deassert-us = <50000>;
++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
++ };
++ };
++};
++
++&i2c1 {
++ status = "okay";
++
++ rk805: pmic@18 {
++ compatible = "rockchip,rk805";
++ reg = <0x18>;
++ interrupt-parent = <&gpio1>;
++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
++ #clock-cells = <1>;
++ clock-output-names = "xin32k", "rk805-clkout2";
++ gpio-controller;
++ #gpio-cells = <2>;
++ pinctrl-0 = <&pmic_int_l>;
++ pinctrl-names = "default";
++ rockchip,system-power-controller;
++ wakeup-source;
++
++ vcc1-supply = <&vcc_sys>;
++ vcc2-supply = <&vcc_sys>;
++ vcc3-supply = <&vcc_sys>;
++ vcc4-supply = <&vcc_sys>;
++ vcc5-supply = <&vcc_io>;
++ vcc6-supply = <&vcc_sys>;
++
++ regulators {
++ vdd_log: DCDC_REG1 {
++ regulator-name = "vdd_log";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <712500>;
++ regulator-max-microvolt = <1450000>;
++ regulator-ramp-delay = <12500>;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1000000>;
++ };
++ };
++
++ vdd_arm: DCDC_REG2 {
++ regulator-name = "vdd_arm";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <712500>;
++ regulator-max-microvolt = <1450000>;
++ regulator-ramp-delay = <12500>;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <950000>;
++ };
++ };
++
++ vcc_ddr: DCDC_REG3 {
++ regulator-name = "vcc_ddr";
++ regulator-always-on;
++ regulator-boot-on;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ };
++ };
++
++ vcc_io: DCDC_REG4 {
++ regulator-name = "vcc_io";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <3300000>;
++ };
++ };
++
++ vcc_18: LDO_REG1 {
++ regulator-name = "vcc_18";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1800000>;
++ };
++ };
++
++ vcc18_emmc: LDO_REG2 {
++ regulator-name = "vcc18_emmc";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1800000>;
++ };
++ };
++
++ vdd_10: LDO_REG3 {
++ regulator-name = "vdd_10";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1000000>;
++ regulator-max-microvolt = <1000000>;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1000000>;
++ };
++ };
++ };
++ };
++};
++
++&io_domains {
++ pmuio-supply = <&vcc_io>;
++ vccio1-supply = <&vcc_io>;
++ vccio2-supply = <&vcc18_emmc>;
++ vccio3-supply = <&vcc_io>;
++ vccio4-supply = <&vcc_io>;
++ vccio5-supply = <&vcc_io>;
++ vccio6-supply = <&vcc_io>;
++ status = "okay";
++};
++
++&pinctrl {
++ gmac2io {
++ eth_phy_reset_pin: eth-phy-reset-pin {
++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
++ };
++ };
++
++ leds {
++ lan_led_pin: lan-led-pin {
++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ sys_led_pin: sys-led-pin {
++ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ wan_led_pin: wan-led-pin {
++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ lan {
++ lan_vdd_pin: lan-vdd-pin {
++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ pmic {
++ pmic_int_l: pmic-int-l {
++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
++ };
++ };
++};
++
++&pwm2 {
++ status = "okay";
++};
++
++&sdmmc {
++ bus-width = <4>;
++ cap-sd-highspeed;
++ disable-wp;
++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
++ pinctrl-names = "default";
++ vmmc-supply = <&vcc_sd>;
++ status = "okay";
++};
++
++&spi0 {
++ status = "okay";
++
++ flash@0 {
++ compatible = "jedec,spi-nor";
++ reg = <0>;
++ spi-max-frequency = <50000000>;
++ };
++};
++
++&tsadc {
++ rockchip,hw-tshut-mode = <0>;
++ rockchip,hw-tshut-polarity = <0>;
++ status = "okay";
++};
++
++&u2phy {
++ status = "okay";
++};
++
++&u2phy_host {
++ status = "okay";
++};
++
++&u2phy_otg {
++ status = "okay";
++};
++
++&uart2 {
++ status = "okay";
++};
++
++&usb20_otg {
++ dr_mode = "host";
++ status = "okay";
++};
++
++&usbdrd3 {
++ dr_mode = "host";
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ /* Second port is for USB 3.0 */
++ rtl8153: device@2 {
++ compatible = "usbbda,8153";
++ reg = <2>;
++ };
++};
++
++&usb_host0_ehci {
++ status = "okay";
++};
++
++&usb_host0_ohci {
++ status = "okay";
++};
--- /dev/null
+From d2166e3b3680bd2b206aebf1e1ce4c0d346f3c50 Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Fri, 19 May 2023 12:10:52 +0800
+Subject: [PATCH] arm64: dts: rockchip: Update LED properties for Orange Pi R1
+ Plus
+
+Add OpenWrt's LED aliases for showing system status.
+Also replace function/color with legacy label as OpenWrt relys on it
+to update LED settings.
+
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+---
+ .../dts/rockchip/rk3328-orangepi-r1-plus.dts | 17 +++++++++--------
+ 1 file changed, 9 insertions(+), 8 deletions(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
+@@ -17,6 +17,11 @@
+ aliases {
+ ethernet1 = &rtl8153;
+ mmc0 = &sdmmc;
++
++ led-boot = &status_led;
++ led-failsafe = &status_led;
++ led-running = &status_led;
++ led-upgrade = &status_led;
+ };
+
+ chosen {
+@@ -36,22 +41,18 @@
+ pinctrl-names = "default";
+
+ led-0 {
+- function = LED_FUNCTION_LAN;
+- color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
++ label = "green:lan";
+ };
+
+- led-1 {
+- function = LED_FUNCTION_STATUS;
+- color = <LED_COLOR_ID_RED>;
++ status_led: led-1 {
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+- linux,default-trigger = "heartbeat";
++ label = "red:status";
+ };
+
+ led-2 {
+- function = LED_FUNCTION_WAN;
+- color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
++ label = "green:wan";
+ };
+ };
+
--- /dev/null
+From b46a530d12ada422b9d5b2b97059e0d3ed950b40 Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Fri, 19 May 2023 12:38:04 +0800
+Subject: [PATCH] arm64: dts: rockchip: add LED configuration to Orange Pi R1
+ Plus
+
+Add the correct value for the RTL8153 LED configuration register to
+match the blink behavior of the other port on the device.
+
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+---
+ arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
+@@ -362,6 +362,7 @@
+ rtl8153: device@2 {
+ compatible = "usbbda,8153";
+ reg = <2>;
++ realtek,led-data = <0x87>;
+ };
+ };
+
projects / openwrt / staging / stintel.git / commitdiff