drm/i915: use wait_for_vblank instead of msleep(17)

17 ms is eerily close to 60 Hz ^-1

Unfortunately this goes back to the original DP enabling for ilk, and
unfortunately does not come with a reason for it's existance attached.

Some closer inspection of the code and DP specs shows that we set the
idle link pattern before we disable the port. And it seems like that
the DP spec (or at least our hw) only switch to the idle pattern on
the next vblank. Hence a vblank wait at this spot makes _much_ more
sense than a really long wait.

v2: Rebase fixup.

v3: Add comment requested by Paulo Zanoni saying that we don't really
know what this wait is for.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index c01163d22d178513f1b24ac41c78610f3b5e8903..89164c553b2d0621f441f2419206a06034ef8516 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2041,6 +2041,8 @@ intel_dp_link_down(struct intel_dp *intel_dp)
        struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
        struct drm_device *dev = intel_dig_port->base.base.dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
+       struct intel_crtc *intel_crtc =
+               to_intel_crtc(intel_dig_port->base.base.crtc);
        uint32_t DP = intel_dp->DP;
 
        /*
@@ -2075,7 +2077,8 @@ intel_dp_link_down(struct intel_dp *intel_dp)
        }
        POSTING_READ(intel_dp->output_reg);
 
-       msleep(17);
+       /* We don't really know why we're doing this */
+       intel_wait_for_vblank(dev, intel_crtc->pipe);
 
        if (HAS_PCH_IBX(dev) &&
            I915_READ(intel_dp->output_reg) & DP_PIPEB_SELECT) {
@@ -2107,7 +2110,7 @@ intel_dp_link_down(struct intel_dp *intel_dp)
                        POSTING_READ(intel_dp->output_reg);
                        msleep(50);
                } else
-                       intel_wait_for_vblank(dev, to_intel_crtc(crtc)->pipe);
+                       intel_wait_for_vblank(dev, intel_crtc->pipe);
        }
 
        DP &= ~DP_AUDIO_OUTPUT_ENABLE;