const struct of_device_id dwc2_of_match_table[] = {
{ .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
{ .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params },
-@@ -806,17 +836,23 @@ int dwc2_get_hwparams(struct dwc2_hsotg
+@@ -819,17 +849,23 @@ int dwc2_get_hwparams(struct dwc2_hsotg
int dwc2_init_params(struct dwc2_hsotg *hsotg)
{
--- /dev/null
+From 28b5c129ca6e585ec95c160ec4297bc6c6360b6f Mon Sep 17 00:00:00 2001
+From: Minas Harutyunyan <minas.harutyunyan@synopsys.com>
+Date: Mon, 4 Mar 2019 17:08:07 +0400
+Subject: usb: dwc2: Set lpm mode parameters depend on HW configuration
+
+If core not supported lpm, i.e. BCM2835 then confusing warnings seen
+in log.
+
+To avoid these warnings, added function dwc2_set_param_lpm() to set
+lpm and other lpm related parameters based on lpm support by core.
+
+Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
+Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+---
+ drivers/usb/dwc2/params.c | 23 ++++++++++++++++++-----
+ 1 file changed, 18 insertions(+), 5 deletions(-)
+
+--- a/drivers/usb/dwc2/params.c
++++ b/drivers/usb/dwc2/params.c
+@@ -272,6 +272,23 @@ static void dwc2_set_param_power_down(st
+ hsotg->params.power_down = val;
+ }
+
++static void dwc2_set_param_lpm(struct dwc2_hsotg *hsotg)
++{
++ struct dwc2_core_params *p = &hsotg->params;
++
++ p->lpm = hsotg->hw_params.lpm_mode;
++ if (p->lpm) {
++ p->lpm_clock_gating = true;
++ p->besl = true;
++ p->hird_threshold_en = true;
++ p->hird_threshold = 4;
++ } else {
++ p->lpm_clock_gating = false;
++ p->besl = false;
++ p->hird_threshold_en = false;
++ }
++}
++
+ /**
+ * dwc2_set_default_params() - Set all core parameters to their
+ * auto-detected default values.
+@@ -290,6 +307,7 @@ static void dwc2_set_default_params(stru
+ dwc2_set_param_speed(hsotg);
+ dwc2_set_param_phy_utmi_width(hsotg);
+ dwc2_set_param_power_down(hsotg);
++ dwc2_set_param_lpm(hsotg);
+ p->phy_ulpi_ddr = false;
+ p->phy_ulpi_ext_vbus = false;
+
+@@ -302,11 +320,6 @@ static void dwc2_set_default_params(stru
+ p->reload_ctl = (hw->snpsid >= DWC2_CORE_REV_2_92a);
+ p->uframe_sched = true;
+ p->external_id_pin_ctl = false;
+- p->lpm = true;
+- p->lpm_clock_gating = true;
+- p->besl = true;
+- p->hird_threshold_en = true;
+- p->hird_threshold = 4;
+ p->ipg_isoc_en = false;
+ p->max_packet_count = hw->max_packet_count;
+ p->max_transfer_size = hw->max_transfer_size;