drm/amd/display: add dcn21 core DC changes

Add missing parameters, to make dcn21 compile
without errors

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 42b6a6e41c0ba3a0e85fa74b5cd937af73f5f211..a82352a87808b0fbdc81637a7a55d0efbcc32f1b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -385,6 +385,9 @@ struct dc_debug_options {
        struct dc_bw_validation_profile bw_val_profile;
 #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
        bool disable_fec;
+#endif
+#ifdef CONFIG_DRM_AMD_DC_DCN2_1
+       bool disable_48mhz_pwrdwn;
 #endif
        /* This forces a hard min on the DCFCLK requested to SMU/PP
         * watermarks are not affected.

diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
index 8726bd7dd9109693e6daab56e58edd97133cbe6b..f189307750ab3544679b132a904f8ff1ee4320eb 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
@@ -87,6 +87,9 @@ void core_link_set_avmute(struct pipe_ctx *pipe_ctx, bool enable);
 struct resource_pool;
 struct dc_state;
 struct resource_context;
+#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
+struct clk_bw_params;
+#endif
 
 struct resource_funcs {
        void (*destroy)(struct resource_pool **pool);

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h b/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
index 7193acfcd779db4f1d157faa7fbc6140e42d6b76..e8668388581b2568d6da9f4ef1698bd96ac28c00 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
@@ -40,6 +40,10 @@ struct cstate_pstate_watermarks_st {
 struct dcn_watermarks {
        uint32_t pte_meta_urgent_ns;
        uint32_t urgent_ns;
+#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
+       uint32_t frac_urg_bw_nom;
+       uint32_t frac_urg_bw_flip;
+#endif
        struct cstate_pstate_watermarks_st cstate_pstate;
 };
 

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
index 732a93df184414b3cba942071ddbbd079581d117..3a938cd414ea4cced48bdc15098e56a8229416fe 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
@@ -48,6 +48,7 @@ struct dce_hwseq_wa {
        bool DEGVIDCN10_253;
        bool false_optc_underflow;
        bool DEGVIDCN10_254;
+       bool DEGVIDCN21;
 };
 
 struct hwseq_wa_state {