--- /dev/null
+From e4a9748e7103c47e575459db2b6a77d14f34da2b Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 14 Jan 2025 00:10:02 +0100
+Subject: [PATCH 1/4] clk: en7523: Rework clock handling for different clock
+ numbers
+
+Airoha EN7581 SoC have additional clock compared to EN7523 but current
+driver permits to only support up to EN7523 clock numbers.
+
+To handle this, rework the clock handling and permit to declare the
+clocks number in match_data and alloca clk_data based on the compatible
+match_data.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-2-ansuelsmth@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ drivers/clk/clk-en7523.c | 14 ++++++++------
+ 1 file changed, 8 insertions(+), 6 deletions(-)
+
+--- a/drivers/clk/clk-en7523.c
++++ b/drivers/clk/clk-en7523.c
+@@ -75,6 +75,7 @@ struct en_rst_data {
+ };
+
+ struct en_clk_soc_data {
++ u32 num_clocks;
+ const struct clk_ops pcie_ops;
+ int (*hw_init)(struct platform_device *pdev,
+ struct clk_hw_onecell_data *clk_data);
+@@ -504,8 +505,6 @@ static void en7523_register_clocks(struc
+ u32 rate;
+ int i;
+
+- clk_data->num = EN7523_NUM_CLOCKS;
+-
+ for (i = 0; i < ARRAY_SIZE(en7523_base_clks); i++) {
+ const struct en_clk_desc *desc = &en7523_base_clks[i];
+ u32 reg = desc->div_reg ? desc->div_reg : desc->base_reg;
+@@ -587,8 +586,6 @@ static void en7581_register_clocks(struc
+
+ hw = en7523_register_pcie_clk(dev, base);
+ clk_data->hws[EN7523_CLK_PCIE] = hw;
+-
+- clk_data->num = EN7523_NUM_CLOCKS;
+ }
+
+ static int en7523_reset_update(struct reset_controller_dev *rcdev,
+@@ -702,13 +699,15 @@ static int en7523_clk_probe(struct platf
+ struct clk_hw_onecell_data *clk_data;
+ int r;
+
++ soc_data = device_get_match_data(&pdev->dev);
++
+ clk_data = devm_kzalloc(&pdev->dev,
+- struct_size(clk_data, hws, EN7523_NUM_CLOCKS),
++ struct_size(clk_data, hws, soc_data->num_clocks),
+ GFP_KERNEL);
+ if (!clk_data)
+ return -ENOMEM;
+
+- soc_data = device_get_match_data(&pdev->dev);
++ clk_data->num = soc_data->num_clocks;
+ r = soc_data->hw_init(pdev, clk_data);
+ if (r)
+ return r;
+@@ -717,6 +716,7 @@ static int en7523_clk_probe(struct platf
+ }
+
+ static const struct en_clk_soc_data en7523_data = {
++ .num_clocks = ARRAY_SIZE(en7523_base_clks) + 1,
+ .pcie_ops = {
+ .is_enabled = en7523_pci_is_enabled,
+ .prepare = en7523_pci_prepare,
+@@ -726,6 +726,8 @@ static const struct en_clk_soc_data en75
+ };
+
+ static const struct en_clk_soc_data en7581_data = {
++ /* We increment num_clocks by 1 to account for additional PCIe clock */
++ .num_clocks = ARRAY_SIZE(en7581_base_clks) + 1,
+ .pcie_ops = {
+ .is_enabled = en7581_pci_is_enabled,
+ .enable = en7581_pci_enable,
--- /dev/null
+From 02d3b7557ce28c373ea1e925ae16ab5988284313 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 14 Jan 2025 00:10:03 +0100
+Subject: [PATCH 2/4] dt-bindings: clock: drop NUM_CLOCKS define for EN7581
+
+Drop NUM_CLOCKS define for EN7581 include. This is not a binding and
+should not be placed here. Value is derived internally in the user
+driver.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Link: https://lore.kernel.org/r/20250113231030.6735-3-ansuelsmth@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ include/dt-bindings/clock/en7523-clk.h | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/include/dt-bindings/clock/en7523-clk.h
++++ b/include/dt-bindings/clock/en7523-clk.h
+@@ -12,6 +12,4 @@
+ #define EN7523_CLK_CRYPTO 6
+ #define EN7523_CLK_PCIE 7
+
+-#define EN7523_NUM_CLOCKS 8
+-
+ #endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */
--- /dev/null
+From 82108ad3285f58f314ad41398f44017c7dbe44de Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 14 Jan 2025 00:10:04 +0100
+Subject: [PATCH 3/4] dt-bindings: clock: add ID for eMMC for EN7581
+
+Add ID for eMMC for EN7581. This is to control clock selection of eMMC
+between 200MHz and 150MHz.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Acked-by: Conor Dooley <conor.dooley@microchip.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-4-ansuelsmth@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ include/dt-bindings/clock/en7523-clk.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/include/dt-bindings/clock/en7523-clk.h
++++ b/include/dt-bindings/clock/en7523-clk.h
+@@ -12,4 +12,6 @@
+ #define EN7523_CLK_CRYPTO 6
+ #define EN7523_CLK_PCIE 7
+
++#define EN7581_CLK_EMMC 8
++
+ #endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */
--- /dev/null
+From bfe257f9780d8f77045a7da6ec959ee0659d2f98 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 14 Jan 2025 00:10:05 +0100
+Subject: [PATCH 4/4] clk: en7523: Add clock for eMMC for EN7581
+
+Add clock for eMMC for EN7581. This is used to give info of the current
+eMMC source clock and to switch it from 200MHz or 150MHz.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-5-ansuelsmth@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ drivers/clk/clk-en7523.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/clk/clk-en7523.c
++++ b/drivers/clk/clk-en7523.c
+@@ -91,6 +91,7 @@ static const u32 emi7581_base[] = { 5400
+ static const u32 bus7581_base[] = { 600000000, 540000000 };
+ static const u32 npu7581_base[] = { 800000000, 750000000, 720000000, 600000000 };
+ static const u32 crypto_base[] = { 540000000, 480000000 };
++static const u32 emmc7581_base[] = { 200000000, 150000000 };
+
+ static const struct en_clk_desc en7523_base_clks[] = {
+ {
+@@ -281,6 +282,15 @@ static const struct en_clk_desc en7581_b
+ .base_shift = 0,
+ .base_values = crypto_base,
+ .n_base_values = ARRAY_SIZE(crypto_base),
++ }, {
++ .id = EN7581_CLK_EMMC,
++ .name = "emmc",
++
++ .base_reg = REG_CRYPTO_CLKSRC2,
++ .base_bits = 1,
++ .base_shift = 12,
++ .base_values = emmc7581_base,
++ .n_base_values = ARRAY_SIZE(emmc7581_base),
+ }
+ };
+
+++ /dev/null
-From 04cd09990fdc3106d9fc4c47dda100e521d62a43 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Wed, 18 Dec 2024 10:03:45 +0100
-Subject: [PATCH 1/4] clk: en7523: Rework clock handling for different clock
- numbers
-
-Airoha EN7581 SoC have additional clock compared to EN7523 but current
-driver permits to only support up to EN7523 clock numbers.
-
-To handle this, rework the clock handling and permit to declare the
-clocks number in match_data and alloca clk_data based on the compatible
-match_data.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
----
- drivers/clk/clk-en7523.c | 14 ++++++++------
- 1 file changed, 8 insertions(+), 6 deletions(-)
-
---- a/drivers/clk/clk-en7523.c
-+++ b/drivers/clk/clk-en7523.c
-@@ -75,6 +75,7 @@ struct en_rst_data {
- };
-
- struct en_clk_soc_data {
-+ u32 num_clocks;
- const struct clk_ops pcie_ops;
- int (*hw_init)(struct platform_device *pdev,
- struct clk_hw_onecell_data *clk_data);
-@@ -504,8 +505,6 @@ static void en7523_register_clocks(struc
- u32 rate;
- int i;
-
-- clk_data->num = EN7523_NUM_CLOCKS;
--
- for (i = 0; i < ARRAY_SIZE(en7523_base_clks); i++) {
- const struct en_clk_desc *desc = &en7523_base_clks[i];
- u32 reg = desc->div_reg ? desc->div_reg : desc->base_reg;
-@@ -587,8 +586,6 @@ static void en7581_register_clocks(struc
-
- hw = en7523_register_pcie_clk(dev, base);
- clk_data->hws[EN7523_CLK_PCIE] = hw;
--
-- clk_data->num = EN7523_NUM_CLOCKS;
- }
-
- static int en7523_reset_update(struct reset_controller_dev *rcdev,
-@@ -702,21 +699,24 @@ static int en7523_clk_probe(struct platf
- struct clk_hw_onecell_data *clk_data;
- int r;
-
-+ soc_data = device_get_match_data(&pdev->dev);
-+
- clk_data = devm_kzalloc(&pdev->dev,
-- struct_size(clk_data, hws, EN7523_NUM_CLOCKS),
-+ struct_size(clk_data, hws, soc_data->num_clocks),
- GFP_KERNEL);
- if (!clk_data)
- return -ENOMEM;
-
-- soc_data = device_get_match_data(&pdev->dev);
- r = soc_data->hw_init(pdev, clk_data);
- if (r)
- return r;
-
-+ clk_data->num = soc_data->num_clocks;
- return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
- }
-
- static const struct en_clk_soc_data en7523_data = {
-+ .num_clocks = ARRAY_SIZE(en7523_base_clks) + 1,
- .pcie_ops = {
- .is_enabled = en7523_pci_is_enabled,
- .prepare = en7523_pci_prepare,
-@@ -726,6 +726,8 @@ static const struct en_clk_soc_data en75
- };
-
- static const struct en_clk_soc_data en7581_data = {
-+ /* We increment num_clocks by 1 to account for additional PCIe clock */
-+ .num_clocks = ARRAY_SIZE(en7581_base_clks) + 1,
- .pcie_ops = {
- .is_enabled = en7581_pci_is_enabled,
- .enable = en7581_pci_enable,
+++ /dev/null
-From 8fc9b68ee448d0e687d4dc52ec95bf367eb04caa Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Thu, 19 Dec 2024 13:13:37 +0100
-Subject: [PATCH 2/4] dt-bindings: clock: drop NUM_CLOCKS define for EN7581
-
-Drop NUM_CLOCKS define for EN7581 include. This is not a binding and
-should not be placed here. Value is derived internally in the user
-driver.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
----
- include/dt-bindings/clock/en7523-clk.h | 2 --
- 1 file changed, 2 deletions(-)
-
---- a/include/dt-bindings/clock/en7523-clk.h
-+++ b/include/dt-bindings/clock/en7523-clk.h
-@@ -12,6 +12,4 @@
- #define EN7523_CLK_CRYPTO 6
- #define EN7523_CLK_PCIE 7
-
--#define EN7523_NUM_CLOCKS 8
--
- #endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */
+++ /dev/null
-From 238436f998c551688695d26ecdcd2ea4d51190b1 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Wed, 11 Dec 2024 12:22:37 +0100
-Subject: [PATCH 3/4] dt-bindings: clock: add ID for eMMC for EN7581
-
-Add ID for eMMC for EN7581. This is to control clock selection of eMMC
-between 200MHz and 150MHz.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
-Acked-by: Conor Dooley <conor.dooley@microchip.com>
----
- include/dt-bindings/clock/en7523-clk.h | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/include/dt-bindings/clock/en7523-clk.h
-+++ b/include/dt-bindings/clock/en7523-clk.h
-@@ -12,4 +12,6 @@
- #define EN7523_CLK_CRYPTO 6
- #define EN7523_CLK_PCIE 7
-
-+#define EN7581_CLK_EMMC 8
-+
- #endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */
+++ /dev/null
-From 4fc22765b3888cf6575015b904718bfd36d1f49c Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Wed, 11 Dec 2024 12:22:38 +0100
-Subject: [PATCH 4/4] clk: en7523: Add clock for eMMC for EN7581
-
-Add clock for eMMC for EN7581. This is used to give info of the current
-eMMC source clock and to switch it from 200MHz or 150MHz.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
----
- drivers/clk/clk-en7523.c | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
---- a/drivers/clk/clk-en7523.c
-+++ b/drivers/clk/clk-en7523.c
-@@ -91,6 +91,7 @@ static const u32 emi7581_base[] = { 5400
- static const u32 bus7581_base[] = { 600000000, 540000000 };
- static const u32 npu7581_base[] = { 800000000, 750000000, 720000000, 600000000 };
- static const u32 crypto_base[] = { 540000000, 480000000 };
-+static const u32 emmc7581_base[] = { 200000000, 150000000 };
-
- static const struct en_clk_desc en7523_base_clks[] = {
- {
-@@ -281,6 +282,15 @@ static const struct en_clk_desc en7581_b
- .base_shift = 0,
- .base_values = crypto_base,
- .n_base_values = ARRAY_SIZE(crypto_base),
-+ }, {
-+ .id = EN7581_CLK_EMMC,
-+ .name = "emmc",
-+
-+ .base_reg = REG_CRYPTO_CLKSRC2,
-+ .base_bits = 1,
-+ .base_shift = 12,
-+ .base_values = emmc7581_base,
-+ .n_base_values = ARRAY_SIZE(emmc7581_base),
- }
- };
-
projects / openwrt / staging / nbd.git / commitdiff