MPC512x: Add MSCAN1...4 Clock Control Registers
authorWolfgang Denk <wd@denx.de>
Sun, 14 Jun 2009 18:58:45 +0000 (20:58 +0200)
committerWolfgang Denk <wd@denx.de>
Mon, 13 Jul 2009 22:01:32 +0000 (00:01 +0200)
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
include/asm-ppc/immap_512x.h

index 3648a05f8cbc1a782354c63e31e9a3baf3cd08bb..24e6c6934eeed174d799053b1d5229099fc412c1 100644 (file)
@@ -185,10 +185,11 @@ typedef struct clk512x {
        u8 res0[4];
        u32 bcr;                /* Bread Crumb Register */
        u32 pscccr[12];         /* PSC0-11 Clock Control Registers */
-       u32 spccr;              /* SPDIF Clock Control Registers */
-       u32 cccr;               /* CFM Clock Control Registers */
-       u32 dccr;               /* DIU Clock Control Registers */
-       u8 res1[0xa8];
+       u32 spccr;              /* SPDIF Clock Control Register */
+       u32 cccr;               /* CFM Clock Control Register */
+       u32 dccr;               /* DIU Clock Control Register */
+       u32 msccr[4];           /* MSCAN1-4 Clock Control Registers */
+       u8 res1[0x98];
 } clk512x_t;
 
 /* SPMR - System PLL Mode Register */