Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (44 commits)
  [ARM] 3541/2: workaround for PXA27x erratum E7
  [ARM] nommu: provide a way for correct control register value selection
  [ARM] 3705/1: add supersection support to ioremap()
  [ARM] 3707/1: iwmmxt: use the generic thread notifier infrastructure
  [ARM] 3706/2: ep93xx: add cirrus logic edb9315a support
  [ARM] 3704/1: format IOP Kconfig with tabs, create more consistency
  [ARM] 3703/1: Add help description for ARCH_EP80219
  [ARM] 3678/1: MMC: Make OMAP MMC work
  [ARM] 3677/1: OMAP: Update H2 defconfig
  [ARM] 3676/1: ARM: OMAP: Fix dmtimers and timer32k to compile on OMAP1
  [ARM] Add section support to ioremap
  [ARM] Fix sa11x0 SDRAM selection
  [ARM] Set bit 4 on section mappings correctly depending on CPU
  [ARM] 3666/1: TRIZEPS4 [1/5] core
  ARM: OMAP: Multiplexing for 24xx GPMC wait pin monitoring
  ARM: OMAP: Fix SRAM to use MT_MEMORY instead of MT_DEVICE
  ARM: OMAP: Update dmtimers
  ARM: OMAP: Make clock variables static
  ARM: OMAP: Fix GPMC compilation when DEBUG is defined
  ARM: OMAP: Mux updates for external DMA and GPIO
  ...

diff --cc arch/arm/boot/compressed/head.S
Simple merge

diff --cc arch/arm/kernel/entry-armv.S
Simple merge

diff --cc arch/arm/kernel/head.S
Simple merge

diff --cc arch/arm/kernel/process.c
Simple merge

diff --cc arch/arm/kernel/setup.c
Simple merge

diff --cc arch/arm/mach-at91rm9200/at91rm9200.c
index 0000000000000000000000000000000000000000,90f08d38388970142ecd1dd48f7cd6fc1ade0a5e..7e1d072bdd802180808020e51dcfc771a04ca683
mode 000000,100644..100644
--- /dev/null
--- 2/arch/arm/mach-at91rm9200/at91rm9200.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200.c
@@@ -1,0 -1,110 +1,109 @@@
 -#include <linux/config.h>
+ /*
+  * arch/arm/mach-at91rm9200/at91rm9200.c
+  *
+  *  Copyright (C) 2005 SAN People
+  *
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License as published by
+  * the Free Software Foundation; either version 2 of the License, or
+  * (at your option) any later version.
+  *
+  */
+ 
+ #include <linux/module.h>
+ 
+ #include <asm/mach/arch.h>
+ #include <asm/mach/map.h>
+ 
+ #include <asm/hardware.h>
+ #include "generic.h"
+ 
+ static struct map_desc at91rm9200_io_desc[] __initdata = {
+       {
+               .virtual        = AT91_VA_BASE_SYS,
+               .pfn            = __phys_to_pfn(AT91_BASE_SYS),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_VA_BASE_SPI,
+               .pfn            = __phys_to_pfn(AT91_BASE_SPI),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_VA_BASE_SSC2,
+               .pfn            = __phys_to_pfn(AT91_BASE_SSC2),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_VA_BASE_SSC1,
+               .pfn            = __phys_to_pfn(AT91_BASE_SSC1),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_VA_BASE_SSC0,
+               .pfn            = __phys_to_pfn(AT91_BASE_SSC0),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_VA_BASE_US3,
+               .pfn            = __phys_to_pfn(AT91_BASE_US3),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_VA_BASE_US2,
+               .pfn            = __phys_to_pfn(AT91_BASE_US2),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_VA_BASE_US1,
+               .pfn            = __phys_to_pfn(AT91_BASE_US1),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_VA_BASE_US0,
+               .pfn            = __phys_to_pfn(AT91_BASE_US0),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_VA_BASE_EMAC,
+               .pfn            = __phys_to_pfn(AT91_BASE_EMAC),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_VA_BASE_TWI,
+               .pfn            = __phys_to_pfn(AT91_BASE_TWI),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_VA_BASE_MCI,
+               .pfn            = __phys_to_pfn(AT91_BASE_MCI),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_VA_BASE_UDP,
+               .pfn            = __phys_to_pfn(AT91_BASE_UDP),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_VA_BASE_TCB1,
+               .pfn            = __phys_to_pfn(AT91_BASE_TCB1),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_VA_BASE_TCB0,
+               .pfn            = __phys_to_pfn(AT91_BASE_TCB0),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = AT91_SRAM_VIRT_BASE,
+               .pfn            = __phys_to_pfn(AT91_SRAM_BASE),
+               .length         = AT91_SRAM_SIZE,
+               .type           = MT_DEVICE,
+       },
+ };
+ 
+ void __init at91rm9200_map_io(void)
+ {
+       iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
+ }
+ 

diff --cc arch/arm/mach-at91rm9200/at91rm9200_time.c
index 0000000000000000000000000000000000000000,1077fb85c41157c139cd49d8c026757ca55e7c9e..dc38e06ada6376d67952f3e8b97848338701acf7
mode 000000,100644..100644
--- /dev/null
--- 2/arch/arm/mach-at91rm9200/at91rm9200_time.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200_time.c
@@@ -1,0 -1,142 +1,141 @@@
 -#include <linux/config.h>
+ /*
+  * linux/arch/arm/mach-at91rm9200/at91rm9200_time.c
+  *
+  *  Copyright (C) 2003 SAN People
+  *  Copyright (C) 2003 ATMEL
+  *
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License as published by
+  * the Free Software Foundation; either version 2 of the License, or
+  * (at your option) any later version.
+  *
+  * This program is distributed in the hope that it will be useful,
+  * but WITHOUT ANY WARRANTY; without even the implied warranty of
+  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  * GNU General Public License for more details.
+  *
+  * You should have received a copy of the GNU General Public License
+  * along with this program; if not, write to the Free Software
+  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+  */
+ 
+ #include <linux/init.h>
+ #include <linux/interrupt.h>
+ #include <linux/kernel.h>
+ #include <linux/sched.h>
+ #include <linux/time.h>
+ 
+ #include <asm/hardware.h>
+ #include <asm/io.h>
+ #include <asm/irq.h>
+ #include <asm/mach/time.h>
+ 
+ static unsigned long last_crtr;
+ 
+ /*
+  * The ST_CRTR is updated asynchronously to the master clock.  It is therefore
+  *  necessary to read it twice (with the same value) to ensure accuracy.
+  */
+ static inline unsigned long read_CRTR(void) {
+       unsigned long x1, x2;
+ 
+       do {
+               x1 = at91_sys_read(AT91_ST_CRTR);
+               x2 = at91_sys_read(AT91_ST_CRTR);
+       } while (x1 != x2);
+ 
+       return x1;
+ }
+ 
+ /*
+  * Returns number of microseconds since last timer interrupt.  Note that interrupts
+  * will have been disabled by do_gettimeofday()
+  *  'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
+  *  'tick' is usecs per jiffy (linux/timex.h).
+  */
+ static unsigned long at91rm9200_gettimeoffset(void)
+ {
+       unsigned long elapsed;
+ 
+       elapsed = (read_CRTR() - last_crtr) & AT91_ST_ALMV;
+ 
+       return (unsigned long)(elapsed * (tick_nsec / 1000)) / LATCH;
+ }
+ 
+ /*
+  * IRQ handler for the timer.
+  */
+ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+ {
+       if (at91_sys_read(AT91_ST_SR) & AT91_ST_PITS) { /* This is a shared interrupt */
+               write_seqlock(&xtime_lock);
+ 
+               while (((read_CRTR() - last_crtr) & AT91_ST_ALMV) >= LATCH) {
+                       timer_tick(regs);
+                       last_crtr = (last_crtr + LATCH) & AT91_ST_ALMV;
+               }
+ 
+               write_sequnlock(&xtime_lock);
+ 
+               return IRQ_HANDLED;
+       }
+       else
+               return IRQ_NONE;                /* not handled */
+ }
+ 
+ static struct irqaction at91rm9200_timer_irq = {
+       .name           = "at91_tick",
+       .flags          = SA_SHIRQ | SA_INTERRUPT | SA_TIMER,
+       .handler        = at91rm9200_timer_interrupt
+ };
+ 
+ void at91rm9200_timer_reset(void)
+ {
+       last_crtr = 0;
+ 
+       /* Real time counter incremented every 30.51758 microseconds */
+       at91_sys_write(AT91_ST_RTMR, 1);
+ 
+       /* Set Period Interval timer */
+       at91_sys_write(AT91_ST_PIMR, LATCH);
+ 
+       /* Enable Period Interval Timer interrupt */
+       at91_sys_write(AT91_ST_IER, AT91_ST_PITS);
+ }
+ 
+ /*
+  * Set up timer interrupt.
+  */
+ void __init at91rm9200_timer_init(void)
+ {
+       /* Disable all timer interrupts */
+       at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
+       (void) at91_sys_read(AT91_ST_SR);       /* Clear any pending interrupts */
+ 
+       /* Make IRQs happen for the system timer */
+       setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
+ 
+       /* Change the kernel's 'tick' value to 10009 usec. (the default is 10000) */
+       tick_usec = (LATCH * 1000000) / CLOCK_TICK_RATE;
+ 
+       /* Initialize and enable the timer interrupt */
+       at91rm9200_timer_reset();
+ }
+ 
+ #ifdef CONFIG_PM
+ static void at91rm9200_timer_suspend(void)
+ {
+       /* disable Period Interval Timer interrupt */
+       at91_sys_write(AT91_ST_IDR, AT91_ST_PITS);
+ }
+ #else
+ #define at91rm9200_timer_suspend      NULL
+ #endif
+ 
+ struct sys_timer at91rm9200_timer = {
+       .init           = at91rm9200_timer_init,
+       .offset         = at91rm9200_gettimeoffset,
+       .suspend        = at91rm9200_timer_suspend,
+       .resume         = at91rm9200_timer_reset,
+ };
+ 

diff --cc arch/arm/mach-omap1/time.c
Simple merge

diff --cc arch/arm/mach-omap2/clock.c
Simple merge

diff --cc arch/arm/mach-omap2/devices.c
Simple merge

diff --cc arch/arm/mach-omap2/io.c
Simple merge

diff --cc arch/arm/mach-omap2/mux.c
Simple merge

diff --cc arch/arm/mm/mm-armv.c
Simple merge

diff --cc arch/arm/mm/proc-arm1020.S
Simple merge

diff --cc arch/arm/mm/proc-arm1020e.S
Simple merge

diff --cc arch/arm/mm/proc-arm1022.S
Simple merge

diff --cc arch/arm/mm/proc-arm1026.S
Simple merge

diff --cc arch/arm/mm/proc-arm920.S
Simple merge

diff --cc arch/arm/mm/proc-arm922.S
Simple merge

diff --cc arch/arm/mm/proc-arm925.S
Simple merge

diff --cc arch/arm/mm/proc-arm926.S
Simple merge

diff --cc arch/arm/plat-omap/clock.c
Simple merge

diff --cc arch/arm/plat-omap/devices.c
Simple merge

diff --cc arch/arm/plat-omap/gpio.c
Simple merge

diff --cc arch/arm/plat-omap/sram.c
Simple merge

diff --cc arch/arm/plat-omap/timer32k.c
Simple merge

diff --cc drivers/mmc/omap.c
Simple merge

diff --cc drivers/usb/gadget/omap_udc.c
Simple merge

diff --cc include/asm-arm/thread_info.h
Simple merge