drm/i915: Don't use link_bw to select between TP1 and TP3

intel_dp->link_bw is going away, so consul the port_clock instead when
choosing between TP1 and TP3.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 3d3a908ac2f275626ad0877d847a128546d34626..6231eb14fb761396166a0fc9533b9c56847f3252 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3734,8 +3734,8 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp)
        uint32_t DP = intel_dp->DP;
        uint32_t training_pattern = DP_TRAINING_PATTERN_2;
 
-       /* Training Pattern 3 for HBR2 ot 1.2 devices that support it*/
-       if (intel_dp->link_bw == DP_LINK_BW_5_4 || intel_dp->use_tps3)
+       /* Training Pattern 3 for HBR2 or 1.2 devices that support it*/
+       if (crtc->config->port_clock == 540000 || intel_dp->use_tps3)
                training_pattern = DP_TRAINING_PATTERN_3;
 
        /* channel equalization */