ARC: Cache: Move IOC initialization to a separate function

Move IOC initialization from cache_init() to a separate function.

This is the preparation for the next patch where we'll switch
to is_isa_arcv2() function usage instead of "CONFIG_ISA_ARCV2"
ifdef.

Also it makes cache_init function a bit cleaner.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index 42207b201c58c8784c62ae731252f3d242312ded..af07a11724ba6c8949e4f117c4e75668d024801b 100644 (file)
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -231,6 +231,34 @@ static void __slc_rgn_op(unsigned long paddr, unsigned long sz, const int op)
 
        while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
 }
+
+static void arc_ioc_setup(void)
+{
+       /* IOC Aperture start is equal to DDR start */
+       unsigned int ap_base = CONFIG_SYS_SDRAM_BASE;
+       /* IOC Aperture size is equal to DDR size */
+       long ap_size = CONFIG_SYS_SDRAM_SIZE;
+
+       flush_n_invalidate_dcache_all();
+
+       if (!is_power_of_2(ap_size) || ap_size < 4096)
+               panic("IOC Aperture size must be power of 2 and bigger 4Kib");
+
+       /*
+        * IOC Aperture size decoded as 2 ^ (SIZE + 2) KB,
+        * so setting 0x11 implies 512M, 0x12 implies 1G...
+        */
+       write_aux_reg(ARC_AUX_IO_COH_AP0_SIZE,
+                     order_base_2(ap_size / 1024) - 2);
+
+       /* IOC Aperture start must be aligned to the size of the aperture */
+       if (ap_base % ap_size != 0)
+               panic("IOC Aperture start must be aligned to the size of the aperture");
+
+       write_aux_reg(ARC_AUX_IO_COH_AP0_BASE, ap_base >> 12);
+       write_aux_reg(ARC_AUX_IO_COH_PARTIAL, 1);
+       write_aux_reg(ARC_AUX_IO_COH_ENABLE, 1);
+}
 #endif /* CONFIG_ISA_ARCV2 */
 
 #ifdef CONFIG_ISA_ARCV2
@@ -324,32 +352,8 @@ void cache_init(void)
 #ifdef CONFIG_ISA_ARCV2
        read_decode_cache_bcr_arcv2();
 
-       if (ioc_exists) {
-               /* IOC Aperture start is equal to DDR start */
-               unsigned int ap_base = CONFIG_SYS_SDRAM_BASE;
-               /* IOC Aperture size is equal to DDR size */
-               long ap_size = CONFIG_SYS_SDRAM_SIZE;
-
-               flush_n_invalidate_dcache_all();
-
-               if (!is_power_of_2(ap_size) || ap_size < 4096)
-                       panic("IOC Aperture size must be power of 2 and bigger 4Kib");
-
-               /*
-                * IOC Aperture size decoded as 2 ^ (SIZE + 2) KB,
-                * so setting 0x11 implies 512M, 0x12 implies 1G...
-                */
-               write_aux_reg(ARC_AUX_IO_COH_AP0_SIZE,
-                             order_base_2(ap_size / 1024) - 2);
-
-               /* IOC Aperture start must be aligned to the size of the aperture */
-               if (ap_base % ap_size != 0)
-                       panic("IOC Aperture start must be aligned to the size of the aperture");
-
-               write_aux_reg(ARC_AUX_IO_COH_AP0_BASE, ap_base >> 12);
-               write_aux_reg(ARC_AUX_IO_COH_PARTIAL, 1);
-               write_aux_reg(ARC_AUX_IO_COH_ENABLE, 1);
-       }
+       if (ioc_exists)
+               arc_ioc_setup();
 
        read_decode_mmu_bcr();