#define ETH_FCS_LEN 4
#define AG71XX_DRV_NAME "ag71xx"
-#define AG71XX_DRV_VERSION "0.5.7"
+#define AG71XX_DRV_VERSION "0.5.8"
#define AG71XX_NAPI_TX 1
static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value)
{
+ void __iomem *r;
+
switch (reg) {
case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
- __raw_writel(value, ag->mac_base + reg);
+ r = ag->mac_base + reg;
+ __raw_writel(value, r);
+ __raw_readl(r);
break;
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
- reg -= AG71XX_REG_MAC_IFCTL;
- __raw_writel(value, ag->mac_base2 + reg);
+ r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
+ __raw_writel(value, r);
+ __raw_readl(r);
break;
default:
BUG();
static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg)
{
+ void __iomem *r;
u32 ret;
switch (reg) {
case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
- ret = __raw_readl(ag->mac_base + reg);
+ r = ag->mac_base + reg;
+ ret = __raw_readl(r);
break;
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
- reg -= AG71XX_REG_MAC_IFCTL;
- ret = __raw_readl(ag->mac_base2 + reg);
+ r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
+ ret = __raw_readl(r);
break;
default:
BUG();
case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
r = ag->mac_base + reg;
__raw_writel(__raw_readl(r) | mask, r);
+ __raw_readl(r);
break;
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
__raw_writel(__raw_readl(r) | mask, r);
+ __raw_readl(r);
break;
default:
BUG();
case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
r = ag->mac_base + reg;
__raw_writel(__raw_readl(r) & ~mask, r);
+ __raw_readl(r);
break;
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
__raw_writel(__raw_readl(r) & ~mask, r);
+ __raw_readl(r);
break;
default:
BUG();
static inline void ag71xx_mii_ctrl_wr(struct ag71xx *ag, u32 value)
{
__raw_writel(value, ag->mii_ctrl);
+ __raw_readl(ag->mii_ctrl);
}
static inline u32 ag71xx_mii_ctrl_rr(struct ag71xx *ag)