uboot-rockchip: Update to 2024.04

Removed upstreamed patch.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>

diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile
index a2dd2cffd9684b535b7705ef92304ce69cafca19..863d0157f42002c5777fc5737bc307614d901daf 100644 (file)
--- a/package/boot/uboot-rockchip/Makefile
+++ b/package/boot/uboot-rockchip/Makefile
@@ -5,9 +5,9 @@
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
-PKG_VERSION:=2024.01
+PKG_VERSION:=2024.04
 PKG_RELEASE:=1
-PKG_HASH:=b99611f1ed237bf3541bdc8434b68c96a6e05967061f992443cb30aabebef5b3
+PKG_HASH:=18a853fe39fad7ad03a90cc2d4275aeaed6da69735defac3492b80508843dd4a
 
 PKG_MAINTAINER:=Tobias Maedel <openwrt@tbspace.de>
 

diff --git a/package/boot/uboot-rockchip/patches/001-board-rockchip-Add-support-for-FriendlyARM-NanoPi-R2C-Plu.patch b/package/boot/uboot-rockchip/patches/001-board-rockchip-Add-support-for-FriendlyARM-NanoPi-R2C-Plu.patch
deleted file mode 100644 (file)
index 25e063b..0000000
--- a/package/boot/uboot-rockchip/patches/001-board-rockchip-Add-support-for-FriendlyARM-NanoPi-R2C-Plu.patch
+++ /dev/null
@@ -1,213 +0,0 @@
-From 0bc16c6a8744a1c0293a31253020205b312895d3 Mon Sep 17 00:00:00 2001
-From: Tianling Shen <cnsztl@gmail.com>
-Date: Sat, 23 Dec 2023 12:00:07 +0800
-Subject: [PATCH] board: rockchip: Add support for FriendlyARM NanoPi R2C Plus
-
-The NanoPi R2C Plus is a small variant of NanoPi R2C with a on-board
-eMMC flash (8G) included.
-
-The device tree is taken from the kernel v6.5.
-
-Signed-off-by: Tianling Shen <cnsztl@gmail.com>
-Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
----
- arch/arm/dts/Makefile                         |   1 +
- .../dts/rk3328-nanopi-r2c-plus-u-boot.dtsi    |   9 ++
- arch/arm/dts/rk3328-nanopi-r2c-plus.dts       |  33 +++++
- board/rockchip/evb_rk3328/MAINTAINERS         |   6 +
- configs/nanopi-r2c-plus-rk3328_defconfig      | 114 ++++++++++++++++++
- 5 files changed, 163 insertions(+)
- create mode 100644 arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
- create mode 100644 arch/arm/dts/rk3328-nanopi-r2c-plus.dts
- create mode 100644 configs/nanopi-r2c-plus-rk3328_defconfig
-
---- a/arch/arm/dts/Makefile
-+++ b/arch/arm/dts/Makefile
-@@ -126,6 +126,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
- dtb-$(CONFIG_ROCKCHIP_RK3328) += \
-       rk3328-evb.dtb \
-       rk3328-nanopi-r2c.dtb \
-+      rk3328-nanopi-r2c-plus.dtb \
-       rk3328-nanopi-r2s.dtb \
-       rk3328-orangepi-r1-plus.dtb \
-       rk3328-orangepi-r1-plus-lts.dtb \
---- /dev/null
-+++ b/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
-@@ -0,0 +1,9 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later
-+
-+#include "rk3328-nanopi-r2c-u-boot.dtsi"
-+
-+/ {
-+      chosen {
-+              u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
-+      };
-+};
---- /dev/null
-+++ b/arch/arm/dts/rk3328-nanopi-r2c-plus.dts
-@@ -0,0 +1,33 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+/*
-+ * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd.
-+ * (http://www.friendlyarm.com)
-+ *
-+ * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
-+ */
-+
-+/dts-v1/;
-+#include "rk3328-nanopi-r2c.dts"
-+
-+/ {
-+      model = "FriendlyElec NanoPi R2C Plus";
-+      compatible = "friendlyarm,nanopi-r2c-plus", "rockchip,rk3328";
-+
-+      aliases {
-+              mmc1 = &emmc;
-+      };
-+};
-+
-+&emmc {
-+      bus-width = <8>;
-+      cap-mmc-highspeed;
-+      max-frequency = <150000000>;
-+      mmc-ddr-1_8v;
-+      mmc-hs200-1_8v;
-+      non-removable;
-+      pinctrl-names = "default";
-+      pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
-+      vmmc-supply = <&vcc_io_33>;
-+      vqmmc-supply = <&vcc18_emmc>;
-+      status = "okay";
-+};
---- a/board/rockchip/evb_rk3328/MAINTAINERS
-+++ b/board/rockchip/evb_rk3328/MAINTAINERS
-@@ -11,6 +11,12 @@ S:      Maintained
- F:      configs/nanopi-r2c-rk3328_defconfig
- F:      arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi
- 
-+NANOPI-R2C-PLUS-RK3328
-+M:      Tianling Shen <cnsztl@gmail.com>
-+S:      Maintained
-+F:      configs/nanopi-r2c-plus-rk3328_defconfig
-+F:      arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
-+
- NANOPI-R2S-RK3328
- M:      David Bauer <mail@david-bauer.net>
- S:      Maintained
---- /dev/null
-+++ b/configs/nanopi-r2c-plus-rk3328_defconfig
-@@ -0,0 +1,114 @@
-+CONFIG_ARM=y
-+CONFIG_SKIP_LOWLEVEL_INIT=y
-+CONFIG_COUNTER_FREQUENCY=24000000
-+CONFIG_ARCH_ROCKCHIP=y
-+CONFIG_TEXT_BASE=0x00200000
-+CONFIG_SPL_GPIO=y
-+CONFIG_NR_DRAM_BANKS=1
-+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
-+CONFIG_SF_DEFAULT_SPEED=20000000
-+CONFIG_ENV_OFFSET=0x3F8000
-+CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2c-plus"
-+CONFIG_DM_RESET=y
-+CONFIG_ROCKCHIP_RK3328=y
-+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
-+CONFIG_TPL_LIBCOMMON_SUPPORT=y
-+CONFIG_TPL_LIBGENERIC_SUPPORT=y
-+CONFIG_SPL_DRIVERS_MISC=y
-+CONFIG_SPL_STACK_R_ADDR=0x600000
-+CONFIG_SPL_STACK=0x400000
-+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
-+CONFIG_DEBUG_UART_BASE=0xFF130000
-+CONFIG_DEBUG_UART_CLOCK=24000000
-+CONFIG_SYS_LOAD_ADDR=0x800800
-+CONFIG_DEBUG_UART=y
-+# CONFIG_ANDROID_BOOT_IMAGE is not set
-+CONFIG_FIT=y
-+CONFIG_FIT_VERBOSE=y
-+CONFIG_SPL_LOAD_FIT=y
-+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c-plus.dtb"
-+# CONFIG_DISPLAY_CPUINFO is not set
-+CONFIG_DISPLAY_BOARDINFO_LATE=y
-+CONFIG_MISC_INIT_R=y
-+CONFIG_SPL_MAX_SIZE=0x40000
-+CONFIG_SPL_PAD_TO=0x7f8000
-+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-+CONFIG_SPL_BSS_START_ADDR=0x2000000
-+CONFIG_SPL_BSS_MAX_SIZE=0x2000
-+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-+CONFIG_SPL_STACK_R=y
-+CONFIG_SPL_I2C=y
-+CONFIG_SPL_POWER=y
-+CONFIG_SPL_ATF=y
-+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
-+CONFIG_CMD_BOOTZ=y
-+CONFIG_CMD_GPT=y
-+CONFIG_CMD_MMC=y
-+CONFIG_CMD_USB=y
-+# CONFIG_CMD_SETEXPR is not set
-+CONFIG_CMD_TIME=y
-+CONFIG_SPL_OF_CONTROL=y
-+CONFIG_TPL_OF_CONTROL=y
-+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-+CONFIG_TPL_OF_PLATDATA=y
-+CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_SYS_MMC_ENV_DEV=1
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_TPL_DM=y
-+CONFIG_REGMAP=y
-+CONFIG_SPL_REGMAP=y
-+CONFIG_TPL_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_SPL_SYSCON=y
-+CONFIG_TPL_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_SPL_CLK=y
-+CONFIG_FASTBOOT_BUF_ADDR=0x800800
-+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
-+CONFIG_ROCKCHIP_GPIO=y
-+CONFIG_SYS_I2C_ROCKCHIP=y
-+CONFIG_MISC=y
-+CONFIG_MMC_DW=y
-+CONFIG_MMC_DW_ROCKCHIP=y
-+CONFIG_ETH_DESIGNWARE=y
-+CONFIG_GMAC_ROCKCHIP=y
-+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-+CONFIG_PINCTRL=y
-+CONFIG_SPL_PINCTRL=y
-+CONFIG_DM_PMIC=y
-+CONFIG_PMIC_RK8XX=y
-+CONFIG_SPL_PMIC_RK8XX=y
-+CONFIG_SPL_DM_REGULATOR=y
-+CONFIG_REGULATOR_PWM=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_SPL_DM_REGULATOR_FIXED=y
-+CONFIG_REGULATOR_RK8XX=y
-+CONFIG_PWM_ROCKCHIP=y
-+CONFIG_RAM=y
-+CONFIG_SPL_RAM=y
-+CONFIG_TPL_RAM=y
-+CONFIG_BAUDRATE=1500000
-+CONFIG_DEBUG_UART_SHIFT=2
-+CONFIG_SYS_NS16550_MEM32=y
-+CONFIG_SYSINFO=y
-+CONFIG_SYSRESET=y
-+# CONFIG_TPL_SYSRESET is not set
-+CONFIG_USB=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_EHCI_GENERIC=y
-+CONFIG_USB_OHCI_HCD=y
-+CONFIG_USB_OHCI_GENERIC=y
-+CONFIG_USB_DWC2=y
-+CONFIG_USB_DWC3=y
-+# CONFIG_USB_DWC3_GADGET is not set
-+CONFIG_USB_DWC3_GENERIC=y
-+CONFIG_USB_GADGET=y
-+CONFIG_USB_GADGET_DWC2_OTG=y
-+CONFIG_SPL_TINY_MEMSET=y
-+CONFIG_TPL_TINY_MEMSET=y
-+CONFIG_ERRNO_STR=y