drm/i915/icl: Add WaDisableBankHangMode
authorTvrtko Ursulin <tvrtko.ursulin@intel.com>
Mon, 20 May 2019 11:04:42 +0000 (12:04 +0100)
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Wed, 29 May 2019 10:45:15 +0000 (13:45 +0300)
Disable GPU hang by default on unrecoverable ECC cache errors.

v2:
 * Rebase.

v3:
 * Use intel_uncore_read. (Chris)

Fixes: cc38cae7c4e9 ("drm/i915/icl: Introduce initial Icelake Workarounds")
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190520110442.403-2-tvrtko.ursulin@linux.intel.com
(cherry picked from commit cbe3e1d103793705204b29c6952faed537c41fe1)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_workarounds.c

index b74824f0b5b1fcbc17262bc17e85238e88b2ceb3..c0ab955877c799e6b2740bf66f29d53c2fd640b9 100644 (file)
@@ -7620,6 +7620,9 @@ enum {
   #define GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION             (1 << 8)
   #define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE                 (1 << 0)
 
+#define GEN8_L3CNTLREG _MMIO(0x7034)
+  #define GEN8_ERRDETBCTRL (1 << 9)
+
 #define GEN11_COMMON_SLICE_CHICKEN3            _MMIO(0x7304)
   #define GEN11_BLEND_EMB_FIX_DISABLE_IN_RCC   (1 << 11)
 
index 9682dd575152e4dbada54c62f637b87423964203..03c305151dcf33ed1aea9eae4eb3187bdf469581 100644 (file)
@@ -518,6 +518,12 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine)
        struct drm_i915_private *i915 = engine->i915;
        struct i915_wa_list *wal = &engine->ctx_wa_list;
 
+       /* WaDisableBankHangMode:icl */
+       wa_write(wal,
+                GEN8_L3CNTLREG,
+                intel_uncore_read(engine->uncore, GEN8_L3CNTLREG) |
+                GEN8_ERRDETBCTRL);
+
        /* Wa_1604370585:icl (pre-prod)
         * Formerly known as WaPushConstantDereferenceHoldDisable
         */