drm/amd/display: add dwb stere caps and version
authorCharlene Liu <charlene.liu@amd.com>
Tue, 21 May 2019 17:32:02 +0000 (13:32 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Sat, 22 Jun 2019 14:34:13 +0000 (09:34 -0500)
add dwb stereo caps and ver for future use

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc_types.h
drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h

index a06429ca00196723db26dcab61529766a231e6bd..6eabb6491a3df07ce0d42025806aa5b1dfafa727 100644 (file)
@@ -582,6 +582,7 @@ struct dc_info_packet_128 {
        uint8_t hb3;
        uint8_t sb[128];
 };
+
 #define DC_PLANE_UPDATE_TIMES_MAX 10
 
 struct dc_plane_flip_time {
index 0ac21fa231c700f936dbc39092acc65aceea0010..a3409294ae0c849a22db46d7108541b9eddfa47a 100644 (file)
@@ -38,6 +38,7 @@ enum dce_version;
 
 enum dwb_sw_version {
        dwb_ver_1_0 = 1,
+       dwb_ver_2_0 = 2,
 };
 
 enum dwb_source {
@@ -112,8 +113,9 @@ struct dwb_caps {
                unsigned int support_ogam       :1;
                unsigned int support_wbscl      :1;
                unsigned int support_ocsc       :1;
+               unsigned int support_stereo :1;
        } caps;
-       unsigned int     reserved2[10]; /* Reserved for future use, MUST BE 0. */
+       unsigned int     reserved2[9];  /* Reserved for future use, MUST BE 0. */
 };
 
 struct dwbc {