mpc83xx: system performance settings for MPC8349EMDS.
authorLee Nipper <lee.nipper@freescale.com>
Fri, 25 Apr 2008 20:44:45 +0000 (15:44 -0500)
committerKim Phillips <kim.phillips@freescale.com>
Tue, 6 May 2008 18:22:25 +0000 (13:22 -0500)
These same settings are used on MPC8349ITX, and
improve performance on MPC8349EMDS.

Signed-off-by: Lee Nipper <lee.nipper@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
include/configs/MPC8349EMDS.h

index 364ffac5ea16548997a5d973448d4c768e397260..cf552c2487a7faec8610a55264122b3b8c765bfb 100644 (file)
        HRCWH_TSEC2M_IN_GMII )
 #endif
 
+/*
+ * System performance
+ */
+#define CFG_ACR_PIPE_DEP       3       /* Arbiter pipeline depth (0-3) */
+#define CFG_ACR_RPTCNT         3       /* Arbiter repeat count (0-7) */
+#define CFG_SPCR_TSEC1EP       3       /* TSEC1 emergency priority (0-3) */
+#define CFG_SPCR_TSEC2EP       3       /* TSEC2 emergency priority (0-3) */
+#define CFG_SCCR_TSEC1CM       1       /* TSEC1 clock mode (0-3) */
+#define CFG_SCCR_TSEC2CM       1       /* TSEC2 & I2C0 clock mode (0-3) */
+
 /* System IO Config */
 #define CFG_SICRH SICRH_TSOBI1
 #define CFG_SICRL SICRL_LDP_A