The MPC8536 seems to use only 3 bits for the major revision field in the
SVR rather than the 4 bits used by all other processors. The most
significant bit is used as a mfg code on MPC8536.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
svr = get_svr();
major = SVR_MAJ(svr);
-#ifdef CONFIG_MPC8536
- major &= 0x7; /* the msb of this nibble is a mfg code */
-#endif
minor = SVR_MIN(svr);
if (cpu_numcores() > 1) {
#define SVR_FAM(svr) (((svr) >> 20) & 0xFFF) /* Family field */
#define SVR_MEM(svr) (((svr) >> 16) & 0xF) /* Member field */
+#ifdef CONFIG_MPC8536
+#define SVR_MAJ(svr) (((svr) >> 4) & 0x7) /* Major revision field*/
+#else
#define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/
+#endif
#define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/
/* Some parts define SVR[0:23] as the SOC version */