devolo_magic-2-wifi-next \
edgecore_ecw5410 \
edgecore_oap100 \
+ edimax_cax1800 \
extreme-networks_ws-ap3915i \
glinet_gl-a1300 \
glinet_gl-ap1300 \
$(eval $(call generate-ipq-wifi-package,devolo_magic-2-wifi-next,devolo Magic 2 WiFi next))
$(eval $(call generate-ipq-wifi-package,edgecore_ecw5410,Edgecore ECW5410))
$(eval $(call generate-ipq-wifi-package,edgecore_oap100,Edgecore OAP100))
+$(eval $(call generate-ipq-wifi-package,edimax_cax1800,Edimax CAX1800))
$(eval $(call generate-ipq-wifi-package,extreme-networks_ws-ap3915i,Edgecore OAP100))
$(eval $(call generate-ipq-wifi-package,glinet_gl-a1300,GL.iNet GL-A1300))
$(eval $(call generate-ipq-wifi-package,glinet_gl-ap1300,GL.iNet GL-AP1300))
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/* Copyright (c) 2021, Dirk Buchwalder <buchwalder@posteo.de> */
+
+/dts-v1/;
+
+#include "ipq8074-512m.dtsi"
+#include "ipq8074-ac-cpu.dtsi"
+#include "ipq8074-ess.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Edimax CAX1800";
+ compatible = "edimax,cax1800", "qcom,ipq8074";
+
+ aliases {
+ serial0 = &blsp1_uart5;
+ led-boot = &led_system_red;
+ led-failsafe = &led_system_red;
+ led-running = &led_system_green;
+ led-upgrade = &led_system_red;
+ /* Aliases as required by u-boot to patch MAC addresses */
+ ethernet0 = &dp5;
+ label-mac-device = &dp5;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ bootargs-append = " root=/dev/ubiblock0_1";
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_system_red: system-red {
+ label = "red:system";
+ gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
+ };
+
+ led_system_green: system-green {
+ label = "green:system";
+ gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
+ };
+
+ led_system_blue: system-blue {
+ label = "blue:system";
+ gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&tlmm {
+ mdio_pins: mdio-pins {
+ mdc {
+ pins = "gpio68";
+ function = "mdc";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ mdio {
+ pins = "gpio69";
+ function = "mdio";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ };
+};
+
+&blsp1_uart5 {
+ status = "okay";
+};
+
+&prng {
+ status = "okay";
+};
+
+&cryptobam {
+ status = "okay";
+};
+
+&crypto {
+ status = "okay";
+};
+
+&qpic_bam {
+ status = "okay";
+};
+
+&qpic_nand {
+ status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ nand-bus-width = <8>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "rootfs";
+ reg = <0x0000000 0x3400000>;
+ };
+ };
+ };
+};
+
+&blsp1_spi1 {
+ pinctrl-0 = <&spi_0_pins>;
+ pinctrl-names = "default";
+ cs-select = <0>;
+ status = "ok";
+
+ m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
+ use-default-sizes;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "0:sbl1";
+ reg = <0x0 0x50000>;
+ read-only;
+ };
+
+ partition@50000 {
+ label = "0:mibib";
+ reg = <0x50000 0x10000>;
+ read-only;
+ };
+
+ partition@60000 {
+ label = "0:bootconfig";
+ reg = <0x60000 0x20000>;
+ read-only;
+ };
+
+ partition@80000 {
+ label = "0:bootconfig1";
+ reg = <0x80000 0x20000>;
+ read-only;
+ };
+
+ partition@a0000 {
+ label = "0:qsee";
+ reg = <0xa0000 0x180000>;
+ read-only;
+ };
+
+ partition@220000 {
+ label = "0:qsee_1";
+ reg = <0x220000 0x180000>;
+ read-only;
+ };
+
+ partition@3a0000 {
+ label = "0:devcfg";
+ reg = <0x3a0000 0x10000>;
+ read-only;
+ };
+
+ partition@3b0000 {
+ label = "0:devcfg_1";
+ reg = <0x3b0000 0x10000>;
+ read-only;
+ };
+
+ partition@3c0000 {
+ label = "0:apdp";
+ reg = <0x3c0000 0x10000>;
+ read-only;
+ };
+
+ partition@3d0000 {
+ label = "0:apdp_1";
+ reg = <0x3d0000 0x10000>;
+ read-only;
+ };
+
+ partition@3e0000 {
+ label = "0:rpm";
+ reg = <0x3e0000 0x40000>;
+ read-only;
+ };
+
+ partition@420000 {
+ label = "0:rpm_1";
+ reg = <0x420000 0x40000>;
+ read-only;
+ };
+
+ partition@460000 {
+ label = "0:cdt";
+ reg = <0x460000 0x10000>;
+ read-only;
+ };
+
+ partition@470000 {
+ label = "0:cdt_1";
+ reg = <0x470000 0x10000>;
+ read-only;
+ };
+
+ partition@480000 {
+ label = "0:appsblenv";
+ reg = <0x480000 0x10000>;
+ };
+
+ partition@490000 {
+ label = "0:appsbl";
+ reg = <0x490000 0xa0000>;
+ read-only;
+ };
+
+ partition@530000 {
+ label = "0:appsbl_1";
+ reg = <0x530000 0xa0000>;
+ read-only;
+ };
+
+ partition@5d0000 {
+ label = "0:art";
+ reg = <0x5d0000 0x40000>;
+ read-only;
+ };
+
+ partition@610000 {
+ label = "0:ethphyfw";
+ reg = <0x610000 0x80000>;
+ read-only;
+ };
+ };
+ };
+};
+
+&mdio {
+ status = "okay";
+
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+
+ reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
+
+ qca8075: ethernet-phy@4 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <4>;
+ };
+};
+
+&switch {
+ status = "okay";
+
+ switch_cpu_bmp = <0x1>; /* cpu port bitmap */
+ switch_lan_bmp = <0x1e>; /* lan port bitmap */
+ switch_wan_bmp = <0x20>; /* wan port bitmap */
+ switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
+ switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
+ switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
+ bm_tick_mode = <0>; /* bm tick mode */
+ tm_tick_mode = <0>; /* tm tick mode */
+
+ qcom,port_phyinfo {
+ port@0 {
+ port_id = <1>;
+ phy_address = <0>;
+ };
+ port@1 {
+ port_id = <2>;
+ phy_address = <1>;
+ };
+ port@2 {
+ port_id = <3>;
+ phy_address = <2>;
+ };
+ port@3 {
+ port_id = <4>;
+ phy_address = <3>;
+ };
+ port@4 {
+ port_id = <5>;
+ phy_address = <4>;
+ };
+ };
+};
+
+&edma {
+ status = "okay";
+};
+
+&dp5 {
+ status = "okay";
+ phy-handle = <&qca8075>;
+ label = "lan";
+};
+
+&wifi {
+ status = "okay";
+
+ qcom,ath11k-calibration-variant = "Edimax-CAX1800";
+ qcom,ath11k-fw-memory-mode = <1>;
+};
projects / openwrt / staging / dangole.git / commitdiff