pinctrl: mvebu: armada-{370,xp}: normalize ethernet txclkout pins
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tue, 9 Jun 2015 16:47:11 +0000 (18:47 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Wed, 10 Jun 2015 11:50:17 +0000 (13:50 +0200)
This commit normalizes the naming of the Ethernet txclkout pin to be
the same accross Marvell SoCs. It is worth mentioning that the DT
binding documentation of the Armada XP was wrong for MPP12: it said
the function was ge1(txd0), while it is in fact ge1(txclkout). It is
however not really a fix worth sending to stable since it does not
change the behavior, and the driver itself was correct.

Since only the subnames are changed, DT backward compatibility is not
affected.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt
Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
drivers/pinctrl/mvebu/pinctrl-armada-370.c
drivers/pinctrl/mvebu/pinctrl-armada-xp.c

index cc0be9df70823685102c9a52bce86d432dd1891c..44aedd5351c517ed35d62052a7b4d5a50bf21271 100644 (file)
@@ -18,7 +18,7 @@ mpp1          1        gpo, uart0(txd)
 mpp2          2        gpio, i2c0(sck), uart0(txd)
 mpp3          3        gpio, i2c0(sda), uart0(rxd)
 mpp4          4        gpio, cpu_pd(vdd)
-mpp5          5        gpo, ge0(txclko), uart1(txd), spi1(clk), audio(mclk)
+mpp5          5        gpo, ge0(txclkout), uart1(txd), spi1(clk), audio(mclk)
 mpp6          6        gpio, ge0(txd0), sata0(prsnt), tdm(rst), audio(sdo)
 mpp7          7        gpo, ge0(txd1), tdm(dtx), audio(lrclk)
 mpp8          8        gpio, ge0(txd2), uart0(rts), tdm(drx), audio(bclk)
index 561e5190f5acf7eaecdfcfd9562a1ae006199360..0bd7d2f662bea86a92e58a5114242f6afe732b0a 100644 (file)
@@ -18,7 +18,7 @@ only for more detailed description in this document.
 
 name          pins     functions
 ================================================================================
-mpp0          0        gpio, ge0(txclko), lcd(d0)
+mpp0          0        gpio, ge0(txclkout), lcd(d0)
 mpp1          1        gpio, ge0(txd0), lcd(d1)
 mpp2          2        gpio, ge0(txd1), lcd(d2)
 mpp3          3        gpio, ge0(txd2), lcd(d3)
@@ -30,7 +30,7 @@ mpp8          8        gpio, ge0(rxd2), lcd(d8)
 mpp9          9        gpio, ge0(rxd3), lcd(d9)
 mpp10         10       gpio, ge0(rxctl), lcd(d10)
 mpp11         11       gpio, ge0(rxclk), lcd(d11)
-mpp12         12       gpio, ge0(txd4), ge1(txd0), lcd(d12)
+mpp12         12       gpio, ge0(txd4), ge1(txclkout), lcd(d12)
 mpp13         13       gpio, ge0(txd5), ge1(txd1), lcd(d13)
 mpp14         14       gpio, ge0(txd6), ge1(txd2), lcd(d15)
 mpp15         15       gpio, ge0(txd7), ge1(txd3), lcd(d16)
index 54fec8cc608cf0aa35ecd6544f664d12ef81565f..cabf188a1d17b2222255e5f2d0a0ff8f8c89c8e3 100644 (file)
@@ -55,7 +55,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
           MPP_FUNCTION(0x1, "cpu_pd", "vdd")),
        MPP_MODE(5,
           MPP_FUNCTION(0x0, "gpo", NULL),
-          MPP_FUNCTION(0x1, "ge0", "txclko"),
+          MPP_FUNCTION(0x1, "ge0", "txclkout"),
           MPP_FUNCTION(0x2, "uart1", "txd"),
           MPP_FUNCTION(0x4, "spi1", "clk"),
           MPP_FUNCTION(0x5, "audio", "mclk")),
index 9a8b71417620a4c3db33a4990274d6f226e7fc80..fb5ffa57d90db1c05159320781594688e3205fd9 100644 (file)
@@ -54,7 +54,7 @@ enum armada_xp_variant {
 static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
        MPP_MODE(0,
                 MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-                MPP_VAR_FUNCTION(0x1, "ge0", "txclko",     V_MV78230_PLUS),
+                MPP_VAR_FUNCTION(0x1, "ge0", "txclkout",   V_MV78230_PLUS),
                 MPP_VAR_FUNCTION(0x4, "lcd", "d0",         V_MV78230_PLUS)),
        MPP_MODE(1,
                 MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
@@ -103,7 +103,7 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
        MPP_MODE(12,
                 MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
                 MPP_VAR_FUNCTION(0x1, "ge0", "txd4",       V_MV78230_PLUS),
-                MPP_VAR_FUNCTION(0x2, "ge1", "clkout",     V_MV78230_PLUS),
+                MPP_VAR_FUNCTION(0x2, "ge1", "txclkout",   V_MV78230_PLUS),
                 MPP_VAR_FUNCTION(0x4, "lcd", "d12",        V_MV78230_PLUS)),
        MPP_MODE(13,
                 MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),