mac80211/rt2x00: support Rt3352 with external PA

This is needed for WiFi to work e.g. on DIR-615 rev.H1.

Signed-off-by: Daniel Golle <dgolle@allnet.de>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 34268

diff --git a/package/mac80211/patches/622-rt2x00-fix-rt3352-ext-pa.patch b/package/mac80211/patches/622-rt2x00-fix-rt3352-ext-pa.patch
new file mode 100644 (file)
index 0000000..8015a12
--- /dev/null
+++ b/package/mac80211/patches/622-rt2x00-fix-rt3352-ext-pa.patch
@@ -0,0 +1,212 @@
+--- a/drivers/net/wireless/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/rt2x00/rt2800lib.c
+@@ -2271,15 +2271,18 @@ static void rt2800_config_channel(struct
+       /*
+        * Change BBP settings
+        */
++      rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
++      rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
++      rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
++
+       if (rt2x00_rt(rt2x00dev, RT3352)) {
+               rt2800_bbp_write(rt2x00dev, 27, 0x0);
+               rt2800_bbp_write(rt2x00dev, 66, 0x26 + rt2x00dev->lna_gain);
+               rt2800_bbp_write(rt2x00dev, 27, 0x20);
+               rt2800_bbp_write(rt2x00dev, 66, 0x26 + rt2x00dev->lna_gain);
++              rt2800_bbp_write(rt2x00dev, 86, 0x38);
++              rt2800_bbp_write(rt2x00dev, 83, 0x6a);
+       } else {
+-              rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
+-              rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
+-              rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
+               rt2800_bbp_write(rt2x00dev, 86, 0);
+       }
+ 
+@@ -3850,6 +3853,7 @@ static int rt2800_init_rfcsr(struct rt2x
+        * Init RF calibration.
+        */
+       if (rt2x00_rt(rt2x00dev, RT3290) ||
++          rt2x00_rt(rt2x00dev, RT3352) ||
+           rt2x00_rt(rt2x00dev, RT5390) ||
+           rt2x00_rt(rt2x00dev, RT5392)) {
+               rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr);
+@@ -4036,6 +4040,10 @@ static int rt2800_init_rfcsr(struct rt2x
+               rt2800_rfcsr_write(rt2x00dev, 31, 0x00);
+               return 0;
+       } else if (rt2x00_rt(rt2x00dev, RT3352)) {
++              int tx0_int_pa = test_bit(CAPABILITY_INTERNAL_PA_TX0,
++                                        &rt2x00dev->cap_flags);
++              int tx1_int_pa = test_bit(CAPABILITY_INTERNAL_PA_TX1,
++                                        &rt2x00dev->cap_flags);
+               rt2800_rfcsr_write(rt2x00dev, 0, 0xf0);
+               rt2800_rfcsr_write(rt2x00dev, 1, 0x23);
+               rt2800_rfcsr_write(rt2x00dev, 2, 0x50);
+@@ -4069,15 +4077,30 @@ static int rt2800_init_rfcsr(struct rt2x
+               rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
+               rt2800_rfcsr_write(rt2x00dev, 32, 0x80);
+               rt2800_rfcsr_write(rt2x00dev, 33, 0x00);
+-              rt2800_rfcsr_write(rt2x00dev, 34, 0x01);
++              rfcsr =  0x01;
++              if (!tx0_int_pa)
++                      rt2x00_set_field8(&rfcsr, RFCSR34_TX0_EXT_PA, 1);
++              if (!tx1_int_pa)
++                      rt2x00_set_field8(&rfcsr, RFCSR34_TX1_EXT_PA, 1);
++              rt2800_rfcsr_write(rt2x00dev, 34, rfcsr );
+               rt2800_rfcsr_write(rt2x00dev, 35, 0x03);
+               rt2800_rfcsr_write(rt2x00dev, 36, 0xbd);
+               rt2800_rfcsr_write(rt2x00dev, 37, 0x3c);
+               rt2800_rfcsr_write(rt2x00dev, 38, 0x5f);
+               rt2800_rfcsr_write(rt2x00dev, 39, 0xc5);
+               rt2800_rfcsr_write(rt2x00dev, 40, 0x33);
+-              rt2800_rfcsr_write(rt2x00dev, 41, 0x5b);
+-              rt2800_rfcsr_write(rt2x00dev, 42, 0x5b);
++              rfcsr = 0x52;
++              if (tx0_int_pa) {
++                      rt2x00_set_field8(&rfcsr, RFCSR41_BIT1, 1);
++                      rt2x00_set_field8(&rfcsr, RFCSR41_BIT4, 1);
++              }
++              rt2800_rfcsr_write(rt2x00dev, 41, rfcsr);
++              rfcsr = 0x52;
++              if (tx1_int_pa) {
++                      rt2x00_set_field8(&rfcsr, RFCSR42_BIT1, 1);
++                      rt2x00_set_field8(&rfcsr, RFCSR42_BIT4, 1);
++              }
++              rt2800_rfcsr_write(rt2x00dev, 42, rfcsr);
+               rt2800_rfcsr_write(rt2x00dev, 43, 0xdb);
+               rt2800_rfcsr_write(rt2x00dev, 44, 0xdb);
+               rt2800_rfcsr_write(rt2x00dev, 45, 0xdb);
+@@ -4085,15 +4108,20 @@ static int rt2800_init_rfcsr(struct rt2x
+               rt2800_rfcsr_write(rt2x00dev, 47, 0x0d);
+               rt2800_rfcsr_write(rt2x00dev, 48, 0x14);
+               rt2800_rfcsr_write(rt2x00dev, 49, 0x00);
+-              rt2800_rfcsr_write(rt2x00dev, 50, 0x2d);
+-              rt2800_rfcsr_write(rt2x00dev, 51, 0x7f);
+-              rt2800_rfcsr_write(rt2x00dev, 52, 0x00);
+-              rt2800_rfcsr_write(rt2x00dev, 53, 0x52);
+-              rt2800_rfcsr_write(rt2x00dev, 54, 0x1b);
+-              rt2800_rfcsr_write(rt2x00dev, 55, 0x7f);
+-              rt2800_rfcsr_write(rt2x00dev, 56, 0x00);
+-              rt2800_rfcsr_write(rt2x00dev, 57, 0x52);
+-              rt2800_rfcsr_write(rt2x00dev, 58, 0x1b);
++              rfcsr =  0x2d;
++              if (!tx0_int_pa)
++                      rt2x00_set_field8(&rfcsr, RFCSR50_TX0_EXT_PA, 1);
++              if (!tx1_int_pa)
++                      rt2x00_set_field8(&rfcsr, RFCSR50_TX1_EXT_PA, 1);
++              rt2800_rfcsr_write(rt2x00dev, 50, rfcsr);
++              rt2800_rfcsr_write(rt2x00dev, 51, (tx0_int_pa ? 0x7f : 0x52));
++              rt2800_rfcsr_write(rt2x00dev, 52, (tx0_int_pa ? 0x00 : 0xc0));
++              rt2800_rfcsr_write(rt2x00dev, 53, (tx0_int_pa ? 0x52 : 0xd2));
++              rt2800_rfcsr_write(rt2x00dev, 54, (tx0_int_pa ? 0x1b : 0xc0));
++              rt2800_rfcsr_write(rt2x00dev, 55, (tx1_int_pa ? 0x7f : 0x52));
++              rt2800_rfcsr_write(rt2x00dev, 56, (tx1_int_pa ? 0x00 : 0xc0));
++              rt2800_rfcsr_write(rt2x00dev, 57, (tx0_int_pa ? 0x52 : 0x49));
++              rt2800_rfcsr_write(rt2x00dev, 58, (tx1_int_pa ? 0x1b : 0xc0));
+               rt2800_rfcsr_write(rt2x00dev, 59, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 60, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 61, 0x00);
+@@ -4854,7 +4882,8 @@ static int rt2800_init_eeprom(struct rt2
+       /*
+        * Detect if this device has Bluetooth co-existence.
+        */
+-      if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_BT_COEXIST))
++      if (!rt2x00_rt(rt2x00dev, RT3352) &&
++          rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_BT_COEXIST))
+               __set_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags);
+ 
+       /*
+@@ -4883,6 +4912,22 @@ static int rt2800_init_eeprom(struct rt2
+                                       EIRP_MAX_TX_POWER_LIMIT)
+               __set_bit(CAPABILITY_POWER_LIMIT, &rt2x00dev->cap_flags);
+ 
++      /*
++       * Detect if device uses internal or external PA
++       */
++      rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
++
++      if (rt2x00_rt(rt2x00dev, RT3352)) {
++              if (!rt2x00_get_field16(eeprom,
++                  EEPROM_NIC_CONF1_EXTERNAL_TX0_PA_3352))
++                      __set_bit(CAPABILITY_INTERNAL_PA_TX0,
++                                &rt2x00dev->cap_flags);
++              if (!rt2x00_get_field16(eeprom,
++                  EEPROM_NIC_CONF1_EXTERNAL_TX1_PA_3352))
++                      __set_bit(CAPABILITY_INTERNAL_PA_TX1,
++                                &rt2x00dev->cap_flags);
++      }
++
+       return 0;
+ }
+ 
+--- a/drivers/net/wireless/rt2x00/rt2800.h
++++ b/drivers/net/wireless/rt2x00/rt2800.h
+@@ -2115,6 +2115,12 @@ struct mac_iveiv_entry {
+ #define RFCSR31_RX_CALIB              FIELD8(0x7f)
+ 
+ /*
++ * RFCSR 34:
++ */
++#define RFCSR34_TX0_EXT_PA            FIELD8(0x04)
++#define RFCSR34_TX1_EXT_PA            FIELD8(0x08)
++
++/*
+  * RFCSR 38:
+  */
+ #define RFCSR38_RX_LO1_EN             FIELD8(0x20)
+@@ -2125,6 +2131,18 @@ struct mac_iveiv_entry {
+ #define RFCSR39_RX_LO2_EN             FIELD8(0x80)
+ 
+ /*
++ * RFCSR 41:
++ */
++#define RFCSR41_BIT1                  FIELD8(0x01)
++#define RFCSR41_BIT4                  FIELD8(0x08)
++
++/*
++ * RFCSR 42:
++ */
++#define RFCSR42_BIT1                  FIELD8(0x01)
++#define RFCSR42_BIT4                  FIELD8(0x08)
++
++/*
+  * RFCSR 49:
+  */
+ #define RFCSR49_TX                    FIELD8(0x3f)
+@@ -2133,6 +2151,8 @@ struct mac_iveiv_entry {
+  * RFCSR 50:
+  */
+ #define RFCSR50_TX                    FIELD8(0x3f)
++#define RFCSR50_TX0_EXT_PA            FIELD8(0x02)
++#define RFCSR50_TX1_EXT_PA            FIELD8(0x10)
+ 
+ /*
+  * RF registers
+@@ -2220,6 +2240,8 @@ struct mac_iveiv_entry {
+  * INTERNAL_TX_ALC: 0: disable, 1: enable
+  * BT_COEXIST: 0: disable, 1: enable
+  * DAC_TEST: 0: disable, 1: enable
++ * EXTERNAL_TX0_PA: 0: disable, 1: enable (only on RT3352)
++ * EXTERNAL_TX1_PA: 0: disable, 1: enable (only on RT3352)
+  */
+ #define       EEPROM_NIC_CONF1                0x001b
+ #define EEPROM_NIC_CONF1_HW_RADIO             FIELD16(0x0001)
+@@ -2237,6 +2259,8 @@ struct mac_iveiv_entry {
+ #define EEPROM_NIC_CONF1_INTERNAL_TX_ALC              FIELD16(0x2000)
+ #define EEPROM_NIC_CONF1_BT_COEXIST           FIELD16(0x4000)
+ #define EEPROM_NIC_CONF1_DAC_TEST             FIELD16(0x8000)
++#define EEPROM_NIC_CONF1_EXTERNAL_TX0_PA_3352 FIELD16(0x4000)
++#define EEPROM_NIC_CONF1_EXTERNAL_TX1_PA_3352 FIELD16(0x8000)
+ 
+ /*
+  * EEPROM frequency
+--- a/drivers/net/wireless/rt2x00/rt2x00.h
++++ b/drivers/net/wireless/rt2x00/rt2x00.h
+@@ -743,6 +743,8 @@ enum rt2x00_capability_flags {
+       CAPABILITY_DOUBLE_ANTENNA,
+       CAPABILITY_BT_COEXIST,
+       CAPABILITY_VCO_RECALIBRATION,
++      CAPABILITY_INTERNAL_PA_TX0,
++      CAPABILITY_INTERNAL_PA_TX1,
+ };
+ 
+ /*