x86/Centaur: Report correct CPU/cache topology
authorDavid Wang <davidwang@zhaoxin.com>
Thu, 3 May 2018 02:32:46 +0000 (10:32 +0800)
committerThomas Gleixner <tglx@linutronix.de>
Sun, 13 May 2018 14:14:24 +0000 (16:14 +0200)
Centaur CPUs enumerate the cache topology in the same way as Intel CPUs,
but the function is unused so for. The Centaur init code also misses to
initialize x86_info::max_cores, so the CPU topology can't be described
correctly.

Initialize x86_info::max_cores and invoke init_cacheinfo() to make
CPU and cache topology information available and correct.

Signed-off-by: David Wang <davidwang@zhaoxin.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: lukelin@viacpu.com
Cc: qiyuanwang@zhaoxin.com
Cc: gregkh@linuxfoundation.org
Cc: brucechang@via-alliance.com
Cc: timguo@zhaoxin.com
Cc: cooperyan@zhaoxin.com
Cc: hpa@zytor.com
Cc: benjaminpan@viatech.com
Link: https://lkml.kernel.org/r/1525314766-18910-4-git-send-email-davidwang@zhaoxin.com
arch/x86/kernel/cpu/centaur.c

index 80d5110481eceb740e7fd7596523aa5d9ba05bd0..c265494234e63c9d3a219263c1df450ed7c982d3 100644 (file)
@@ -160,6 +160,11 @@ static void init_centaur(struct cpuinfo_x86 *c)
        clear_cpu_cap(c, 0*32+31);
 #endif
        early_init_centaur(c);
+       init_intel_cacheinfo(c);
+       c->x86_max_cores = detect_num_cpu_cores(c);
+#ifdef CONFIG_X86_32
+       detect_ht(c);
+#endif
 
        if (c->cpuid_level > 9) {
                unsigned int eax = cpuid_eax(10);