[MTD] [NAND] Add Blackfin BF52x support in bf5xx_nand driver
authorMichael Hennerich <michael.hennerich@analog.com>
Tue, 30 Oct 2007 09:08:29 +0000 (17:08 +0800)
committerDavid Woodhouse <dwmw2@infradead.org>
Tue, 30 Oct 2007 12:50:46 +0000 (08:50 -0400)
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
drivers/mtd/nand/Kconfig
drivers/mtd/nand/bf5xx_nand.c

index 246d4512f64bfd8670a5731809d1280cd2cbfcaa..bf0e9b083d13ff7cf1e4d4948a49ea2e8b5f3750 100644 (file)
@@ -93,7 +93,7 @@ config MTD_NAND_AU1550
 
 config MTD_NAND_BF5XX
        tristate "Blackfin on-chip NAND Flash Controller driver"
-       depends on BF54x && MTD_NAND
+       depends on (BF54x || BF52x) && MTD_NAND
        help
          This enables the Blackfin on-chip NAND flash controller
 
index 1657ecd74881ee4eebd9ce1752ef692a11c05c8b..542850cd4c37c013124b25474c817fd746726899 100644 (file)
@@ -74,7 +74,22 @@ static int hardware_ecc = 1;
 static int hardware_ecc;
 #endif
 
-static unsigned short bfin_nfc_pin_req[] = {P_NAND_CE, P_NAND_RB, 0};
+static unsigned short bfin_nfc_pin_req[] =
+       {P_NAND_CE,
+        P_NAND_RB,
+        P_NAND_D0,
+        P_NAND_D1,
+        P_NAND_D2,
+        P_NAND_D3,
+        P_NAND_D4,
+        P_NAND_D5,
+        P_NAND_D6,
+        P_NAND_D7,
+        P_NAND_WE,
+        P_NAND_RE,
+        P_NAND_CLE,
+        P_NAND_ALE,
+        0};
 
 /*
  * Data structures for bf5xx nand flash controller driver
@@ -507,12 +522,13 @@ static int bf5xx_nand_dma_init(struct bf5xx_nand_info *info)
 
        init_completion(&info->dma_completion);
 
+#ifdef CONFIG_BF54x
        /* Setup DMAC1 channel mux for NFC which shared with SDH */
        val = bfin_read_DMAC1_PERIMUX();
        val &= 0xFFFE;
        bfin_write_DMAC1_PERIMUX(val);
        SSYNC();
-
+#endif
        /* Request NFC DMA channel */
        ret = request_dma(CH_NFC, "BF5XX NFC driver");
        if (ret < 0) {