drm/i915: Consistently use enum pipe for PCH transcoders

The current code uses in some instances enum transcoder for PCH
transcoders and enum pipe in others. This is error prone and clang
raises warnings like this:

drivers/gpu/drm/i915/intel_dp.c:3546:51: warning: implicit conversion
  from enumeration type 'enum pipe' to different enumeration type
  'enum transcoder' [-Wenum-conversion]
    intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);

Consistently use the type enum pipe for PCH transcoders.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20170717181403.57324-1-mka@chromium.org

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 1d33cea01a1b72e8dc517421e362945a88b996f4..0b6f310101eef151be1fab12a012a152a0750c4b 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2086,10 +2086,10 @@ static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
                DRM_DEBUG_DRIVER("PCH transcoder CRC error interrupt\n");
 
        if (pch_iir & SDE_TRANSA_FIFO_UNDER)
-               intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_A);
+               intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_A);
 
        if (pch_iir & SDE_TRANSB_FIFO_UNDER)
-               intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_B);
+               intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_B);
 }
 
 static void ivb_err_int_handler(struct drm_i915_private *dev_priv)
@@ -2123,13 +2123,13 @@ static void cpt_serr_int_handler(struct drm_i915_private *dev_priv)
                DRM_ERROR("PCH poison interrupt\n");
 
        if (serr_int & SERR_INT_TRANS_A_FIFO_UNDERRUN)
-               intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_A);
+               intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_A);
 
        if (serr_int & SERR_INT_TRANS_B_FIFO_UNDERRUN)
-               intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_B);
+               intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_B);
 
        if (serr_int & SERR_INT_TRANS_C_FIFO_UNDERRUN)
-               intel_pch_fifo_underrun_irq_handler(dev_priv, TRANSCODER_C);
+               intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_C);
 
        I915_WRITE(SERR_INT, serr_int);
 }

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index bb9c9c3c391fdc3a5494718250c1753cd3c6be31..a89d0fd1c2e1b9c23ca07235521d09f88f1f2ebe 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1777,7 +1777,7 @@ static void lpt_enable_pch_transcoder(struct drm_i915_private *dev_priv,
 
        /* FDI must be feeding us bits for PCH ports */
        assert_fdi_tx_enabled(dev_priv, (enum pipe) cpu_transcoder);
-       assert_fdi_rx_enabled(dev_priv, TRANSCODER_A);
+       assert_fdi_rx_enabled(dev_priv, PIPE_A);
 
        /* Workaround: set timing override bit. */
        val = I915_READ(TRANS_CHICKEN2(PIPE_A));
@@ -1853,16 +1853,16 @@ void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv)
        I915_WRITE(TRANS_CHICKEN2(PIPE_A), val);
 }
 
-enum transcoder intel_crtc_pch_transcoder(struct intel_crtc *crtc)
+enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc)
 {
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 
        WARN_ON(!crtc->config->has_pch_encoder);
 
        if (HAS_PCH_LPT(dev_priv))
-               return TRANSCODER_A;
+               return PIPE_A;
        else
-               return (enum transcoder) crtc->pipe;
+               return crtc->pipe;
 }
 
 /**
@@ -1901,7 +1901,7 @@ static void intel_enable_pipe(struct intel_crtc *crtc)
                if (crtc->config->has_pch_encoder) {
                        /* if driving the PCH, we need FDI enabled */
                        assert_fdi_rx_pll_enabled(dev_priv,
-                                                 (enum pipe) intel_crtc_pch_transcoder(crtc));
+                                                 intel_crtc_pch_transcoder(crtc));
                        assert_fdi_tx_pll_enabled(dev_priv,
                                                  (enum pipe) cpu_transcoder);
                }
@@ -4579,7 +4579,7 @@ static void lpt_pch_enable(const struct intel_crtc_state *crtc_state)
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
        enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 
-       assert_pch_transcoder_disabled(dev_priv, TRANSCODER_A);
+       assert_pch_transcoder_disabled(dev_priv, PIPE_A);
 
        lpt_program_iclkip(crtc);
 

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index d17a32437f0747264a90216a792416022d99a7b9..0902d7cb48d95a5debe327ac6fb8d7e52380e43c 100644 (file)
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1211,12 +1211,12 @@ hdmi_to_dig_port(struct intel_hdmi *intel_hdmi)
 bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
                                           enum pipe pipe, bool enable);
 bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
-                                          enum transcoder pch_transcoder,
+                                          enum pipe pch_transcoder,
                                           bool enable);
 void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
                                         enum pipe pipe);
 void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
-                                        enum transcoder pch_transcoder);
+                                        enum pipe pch_transcoder);
 void intel_check_cpu_fifo_underruns(struct drm_i915_private *dev_priv);
 void intel_check_pch_fifo_underruns(struct drm_i915_private *dev_priv);
 
@@ -1326,7 +1326,7 @@ void intel_set_cdclk(struct drm_i915_private *dev_priv,
 /* intel_display.c */
 void i830_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);
 void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);
-enum transcoder intel_crtc_pch_transcoder(struct intel_crtc *crtc);
+enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc);
 void intel_update_rawclk(struct drm_i915_private *dev_priv);
 int vlv_get_hpll_vco(struct drm_i915_private *dev_priv);
 int vlv_get_cck_clock(struct drm_i915_private *dev_priv,

diff --git a/drivers/gpu/drm/i915/intel_fifo_underrun.c b/drivers/gpu/drm/i915/intel_fifo_underrun.c
index d484862cc7dfcca502744c35fe7ccefd7a669625..5a7cca32c0fab2e3e6b455b6969f9fbf0c1bcc3c 100644 (file)
--- a/drivers/gpu/drm/i915/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/intel_fifo_underrun.c
@@ -313,11 +313,11 @@ bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
  * Returns the previous state of underrun reporting.
  */
 bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
-                                          enum transcoder pch_transcoder,
+                                          enum pipe pch_transcoder,
                                           bool enable)
 {
        struct intel_crtc *crtc =
-               intel_get_crtc_for_pipe(dev_priv, (enum pipe) pch_transcoder);
+               intel_get_crtc_for_pipe(dev_priv, pch_transcoder);
        unsigned long flags;
        bool old;
 
@@ -390,7 +390,7 @@ void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
  * interrupt to avoid an irq storm.
  */
 void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
-                                        enum transcoder pch_transcoder)
+                                        enum pipe pch_transcoder)
 {
        if (intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder,
                                                  false)) {