drm/amd/powerplay: make athub pg bit configured by pg_flags
authorHuang Rui <ray.huang@amd.com>
Fri, 14 Jun 2019 08:19:36 +0000 (16:19 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 25 Jun 2019 18:54:32 +0000 (13:54 -0500)
The athub pg features enabling should be indicated by pg_flags.

Reported-by: Lijo Lazar <Lijo.Lazar@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/nv.c
drivers/gpu/drm/amd/include/amd_shared.h
drivers/gpu/drm/amd/powerplay/navi10_ppt.c

index c8e79dda7daa7c9b7d1781d9d717f981284752ff..af20ffb55c5495594797a3a39778365be6fac15d 100644 (file)
@@ -509,7 +509,8 @@ static int nv_common_early_init(void *handle)
                        AMD_CG_SUPPORT_BIF_LS;
                adev->pg_flags = AMD_PG_SUPPORT_VCN |
                        AMD_PG_SUPPORT_VCN_DPG |
-                       AMD_PG_SUPPORT_MMHUB;
+                       AMD_PG_SUPPORT_MMHUB |
+                       AMD_PG_SUPPORT_ATHUB;
                adev->external_rev_id = adev->rev_id + 0x1;
                break;
        default:
index 61fe4af4bd44c3d7701366aae7483bc52181cb7b..d352b8d7636510178fee0b48967c4b98e1cf1b3d 100644 (file)
@@ -115,7 +115,8 @@ enum amd_powergating_state {
 #define AMD_PG_SUPPORT_GFX_PIPELINE            (1 << 12)
 #define AMD_PG_SUPPORT_MMHUB                   (1 << 13)
 #define AMD_PG_SUPPORT_VCN                     (1 << 14)
-#define AMD_PG_SUPPORT_VCN_DPG (1 << 15)
+#define AMD_PG_SUPPORT_VCN_DPG                 (1 << 15)
+#define AMD_PG_SUPPORT_ATHUB                   (1 << 16)
 
 enum PP_FEATURE_MASK {
        PP_SCLK_DPM_MASK = 0x1,
index a83b19697a6d4eae6c1cd7630ca72d7bd341e544..527f7fa442efc6af68ce9abb23d67a90e56cf49e 100644 (file)
@@ -325,7 +325,6 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
                                | FEATURE_MASK(FEATURE_FAN_CONTROL_BIT)
                                | FEATURE_MASK(FEATURE_THERMAL_BIT)
                                | FEATURE_MASK(FEATURE_LED_DISPLAY_BIT)
-                               | FEATURE_MASK(FEATURE_ATHUB_PG_BIT)
                                | FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT)
                                | FEATURE_MASK(FEATURE_DS_GFXCLK_BIT)
                                | FEATURE_MASK(FEATURE_DS_DCEFCLK_BIT)
@@ -348,6 +347,9 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
        if (smu->adev->pg_flags & AMD_PG_SUPPORT_MMHUB)
                *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MMHUB_PG_BIT);
 
+       if (smu->adev->pg_flags & AMD_PG_SUPPORT_ATHUB)
+               *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_ATHUB_PG_BIT);
+
        if (smu->adev->pg_flags & AMD_PG_SUPPORT_VCN)
                *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VCN_PG_BIT);