drm/i915: simplify setting DSPCNTR inside ironlake_crtc_mode_set

Because declaring a variable in the beginning of the function, then
initializing it 100 lines later, then using it 100 lines later does
not make our code look good IMHO.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 84e5ed472394a2470269bef0b46dbb3e6fd93035..4457fc7a9533a18fa1eb45e195cc7362a2de1289 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4705,7 +4705,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
        int plane = intel_crtc->plane;
        int refclk, num_connectors = 0;
        intel_clock_t clock, reduced_clock;
-       u32 dpll, fp = 0, fp2 = 0, dspcntr;
+       u32 dpll, fp = 0, fp2 = 0;
        bool ok, has_reduced_clock = false, is_sdvo = false;
        bool is_crt = false, is_lvds = false, is_tv = false, is_dp = false;
        struct intel_encoder *encoder, *edp_encoder = NULL;
@@ -4908,9 +4908,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
        else
                dpll |= PLL_REF_INPUT_DREFCLK;
 
-       /* Set up the display plane register */
-       dspcntr = DISPPLANE_GAMMA_ENABLE;
-
        DRM_DEBUG_KMS("Mode for pipe %d:\n", pipe);
        drm_mode_debug_printmodeline(mode);
 
@@ -5054,7 +5051,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
 
        intel_wait_for_vblank(dev, pipe);
 
-       I915_WRITE(DSPCNTR(plane), dspcntr);
+       /* Set up the display plane register */
+       I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE);
        POSTING_READ(DSPCNTR(plane));
 
        ret = intel_pipe_set_base(crtc, x, y, fb);