[media] v4l2-dv-timings.h: add new 4K DMT resolutions

VESA added two new DMT timings in their latest standard document. Add these
to v4l2-dv-timings.h.

Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>

diff --git a/include/uapi/linux/v4l2-dv-timings.h b/include/uapi/linux/v4l2-dv-timings.h
index be709fe29552b2e4ff7b95ce49ac3109291c778c..b6a5fe00a470b9a2009f7cb22af02608dc3f0199 100644 (file)
--- a/include/uapi/linux/v4l2-dv-timings.h
+++ b/include/uapi/linux/v4l2-dv-timings.h
@@ -823,4 +823,21 @@
                V4L2_DV_FL_REDUCED_BLANKING) \
 }
 
+/* 4K resolutions */
+#define V4L2_DV_BT_DMT_4096X2160P60_RB { \
+       .type = V4L2_DV_BT_656_1120, \
+       V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+               556744000, 8, 32, 40, 48, 8, 6, 0, 0, 0, \
+               V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, \
+               V4L2_DV_FL_REDUCED_BLANKING) \
+}
+
+#define V4L2_DV_BT_DMT_4096X2160P59_94_RB { \
+       .type = V4L2_DV_BT_656_1120, \
+       V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+               556188000, 8, 32, 40, 48, 8, 6, 0, 0, 0, \
+               V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, \
+               V4L2_DV_FL_REDUCED_BLANKING) \
+}
+
 #endif