The updated sources bring support for the MT798x Filogic SoC family.
Add builds for MT7986 with most supported storage types, each for DDR3
and DDR4 configurations.
A better solution for skipping bad blocks on SPI-NAND connected via the
SNFI interface has been implemented upstream, so drop local patch.
Add pending patches [1] and [2] to fix boot on existing MT7622 boards.
Tested on BananaPi BPi-R64 (SDMMC, eMMC, SPI-NAND), Linksys E8450 and
Ubiquiti UniFi 6 LR as well as upcoming Bananapi BPi-R3 board for which
support will be added in future patches.
[1]: https://github.com/mtk-openwrt/arm-trusted-firmware/pulls/#3
[2]: https://github.com/mtk-openwrt/arm-trusted-firmware/pulls/#4
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=https://github.com/mtk-openwrt/arm-trusted-firmware.git
-PKG_SOURCE_DATE:=2021-05-08
-PKG_SOURCE_VERSION:=d2c75b2139be003887af9cc5a94da5e9bdc59de7
-PKG_MIRROR_HASH:=4af9ce8e11511afee7f588cc982946c06339edbfa47afef6a7f3e2231ac9f34d
+PKG_SOURCE_DATE:=2022-08-18
+PKG_SOURCE_VERSION:=9c9c49945c24634e4ae6cd924dbb88cf85c7926d
+PKG_MIRROR_HASH:=26b474f40c02da12b7bed56597aeef209757ad1b40a4f0a652794954018b2198
PKG_MAINTAINER:=Daniel Golle <daniel@makrotopia.org>
define Trusted-Firmware-A/Default
BUILD_TARGET:=mediatek
- BUILD_SUBTARGET:=mt7622
- PLAT:=mt7622
TFA_IMAGE:=bl2.img bl31.bin
BOOT_DEVICE:=
DDR3_FLYBY:=
+ DDR_TYPE:=
+ NAND_TYPE:=
endef
define Trusted-Firmware-A/mt7622-nor-1ddr
NAME:=MediaTek MT7622 (SPI-NOR, 1x DDR3)
+ BUILD_SUBTARGET:=mt7622
+ PLAT:=mt7622
BOOT_DEVICE:=nor
endef
define Trusted-Firmware-A/mt7622-nor-2ddr
NAME:=MediaTek MT7622 (SPI-NOR, 2x DDR3)
+ BUILD_SUBTARGET:=mt7622
+ PLAT:=mt7622
BOOT_DEVICE:=nor
DDR3_FLYBY:=1
endef
define Trusted-Firmware-A/mt7622-snand-1ddr
NAME:=MediaTek MT7622 (SPI-NAND, 1x DDR3)
+ BUILD_SUBTARGET:=mt7622
+ PLAT:=mt7622
BOOT_DEVICE:=snand
endef
define Trusted-Firmware-A/mt7622-snand-2ddr
NAME:=MediaTek MT7622 (SPI-NAND, 2x DDR3)
+ BUILD_SUBTARGET:=mt7622
+ PLAT:=mt7622
BOOT_DEVICE:=snand
DDR3_FLYBY:=1
endef
define Trusted-Firmware-A/mt7622-emmc-1ddr
NAME:=MediaTek MT7622 (eMMC, 1x DDR3)
+ BUILD_SUBTARGET:=mt7622
+ PLAT:=mt7622
BOOT_DEVICE:=emmc
endef
define Trusted-Firmware-A/mt7622-emmc-2ddr
NAME:=MediaTek MT7622 (eMMC, 2x DDR3)
+ BUILD_SUBTARGET:=mt7622
+ PLAT:=mt7622
BOOT_DEVICE:=emmc
DDR3_FLYBY:=1
endef
define Trusted-Firmware-A/mt7622-sdmmc-1ddr
- NAME:=MediaTek MT7622 (SDcard, 1x DDR3)
+ NAME:=MediaTek MT7622 (SD card, 1x DDR3)
+ BUILD_SUBTARGET:=mt7622
+ PLAT:=mt7622
BOOT_DEVICE:=sdmmc
endef
define Trusted-Firmware-A/mt7622-sdmmc-2ddr
- NAME:=MediaTek MT7622 (SDcard, 2x DDR3)
+ NAME:=MediaTek MT7622 (SD card, 2x DDR3)
+ BUILD_SUBTARGET:=mt7622
+ PLAT:=mt7622
BOOT_DEVICE:=sdmmc
DDR3_FLYBY:=1
endef
+define Trusted-Firmware-A/mt7986-nor-ddr4
+ NAME:=MediaTek MT7986 (SPI-NOR, DDR4)
+ BOOT_DEVICE:=nor
+ BUILD_SUBTARGET:=filogic
+ PLAT:=mt7986
+ DDR_TYPE:=ddr4
+endef
+
+define Trusted-Firmware-A/mt7986-emmc-ddr4
+ NAME:=MediaTek MT7986 (eMMC, DDR4)
+ BOOT_DEVICE:=emmc
+ BUILD_SUBTARGET:=filogic
+ PLAT:=mt7986
+ DDR_TYPE:=ddr4
+endef
+
+define Trusted-Firmware-A/mt7986-sdmmc-ddr4
+ NAME:=MediaTek MT7986 (SD card, DDR4)
+ BOOT_DEVICE:=sdmmc
+ BUILD_SUBTARGET:=filogic
+ PLAT:=mt7986
+ DDR_TYPE:=ddr4
+endef
+
+define Trusted-Firmware-A/mt7986-snand-ddr4
+ NAME:=MediaTek MT7986 (SPI-NAND via SNFI, DDR4)
+ BOOT_DEVICE:=snand
+ BUILD_SUBTARGET:=filogic
+ PLAT:=mt7986
+ DDR_TYPE:=ddr4
+endef
+
+define Trusted-Firmware-A/mt7986-spim-nand-ddr4
+ NAME:=MediaTek MT7986 (SPI-NAND via SPIM, DDR4)
+ BOOT_DEVICE:=spim-nand
+ BUILD_SUBTARGET:=filogic
+ PLAT:=mt7986
+ DDR_TYPE:=ddr4
+ NAND_TYPE:=spim:2k+64
+endef
+
+define Trusted-Firmware-A/mt7986-nor-ddr3
+ NAME:=MediaTek MT7986 (SPI-NOR, DDR3)
+ BOOT_DEVICE:=nor
+ BUILD_SUBTARGET:=filogic
+ PLAT:=mt7986
+ DDR_TYPE:=ddr3
+endef
+
+define Trusted-Firmware-A/mt7986-emmc-ddr3
+ NAME:=MediaTek MT7986 (eMMC, DDR3)
+ BOOT_DEVICE:=emmc
+ BUILD_SUBTARGET:=filogic
+ PLAT:=mt7986
+ DDR_TYPE:=ddr3
+endef
+
+define Trusted-Firmware-A/mt7986-sdmmc-ddr3
+ NAME:=MediaTek MT7986 (SD card, DDR3)
+ BOOT_DEVICE:=sdmmc
+ BUILD_SUBTARGET:=filogic
+ PLAT:=mt7986
+ DDR_TYPE:=ddr3
+endef
+
+define Trusted-Firmware-A/mt7986-snand-ddr3
+ NAME:=MediaTek MT7986 (SPI-NAND via SNFI, DDR3)
+ BOOT_DEVICE:=snand
+ BUILD_SUBTARGET:=filogic
+ PLAT:=mt7986
+ DDR_TYPE:=ddr3
+endef
+
+define Trusted-Firmware-A/mt7986-spim-nand-ddr3
+ NAME:=MediaTek MT7986 (SPI-NAND via SPIM, DDR3)
+ BOOT_DEVICE:=spim-nand
+ BUILD_SUBTARGET:=filogic
+ PLAT:=mt7986
+ DDR_TYPE:=ddr3
+endef
+
TFA_TARGETS:= \
mt7622-nor-1ddr \
mt7622-nor-2ddr \
mt7622-emmc-1ddr \
mt7622-emmc-2ddr \
mt7622-sdmmc-1ddr \
- mt7622-sdmmc-2ddr
+ mt7622-sdmmc-2ddr \
+ mt7986-emmc-ddr3 \
+ mt7986-nor-ddr3 \
+ mt7986-sdmmc-ddr3 \
+ mt7986-snand-ddr3 \
+ mt7986-spim-nand-ddr3 \
+ mt7986-emmc-ddr4 \
+ mt7986-nor-ddr4 \
+ mt7986-sdmmc-ddr4 \
+ mt7986-snand-ddr4 \
+ mt7986-spim-nand-ddr4
TFA_MAKE_FLAGS += \
BOOT_DEVICE=$(BOOT_DEVICE) \
USE_MKIMAGE=1 MKIMAGE=$(STAGING_DIR_HOST)/bin/mkimage \
+ $(if $(findstring ddr4,$(DDR_TYPE)),DRAM_USE_DDR4=1) \
+ $(if $(NAND_TYPE),NAND_TYPE=$(NAND_TYPE)) \
+ HAVE_DRAM_OBJ_FILE=yes \
$(if $(DDR3_FLYBY),DDR3_FLYBY=1) \
all
define Package/trusted-firmware-a/install
$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
- $(INSTALL_DATA) $(PKG_BUILD_DIR)/build/mt7622/release/bl2.img $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-bl2.img
- $(INSTALL_DATA) $(PKG_BUILD_DIR)/build/mt7622/release/bl31.bin $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-bl31.bin
+ $(INSTALL_DATA) $(PKG_BUILD_DIR)/build/$(PLAT)/release/bl2.img $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-bl2.img
+ $(INSTALL_DATA) $(PKG_BUILD_DIR)/build/$(PLAT)/release/bl31.bin $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-bl31.bin
endef
$(eval $(call BuildPackage/Trusted-Firmware-A))
--- /dev/null
+From daaac60b504e6d5e77156ad0dc3dceca8b786e2d Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Sat, 27 Aug 2022 03:41:57 +0100
+Subject: [PATCH] spi-nor: add more Winbond device IDs
+
+Add device IDs for Winbond W25Q256 and W25Q512 variants.
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/mtd/nor/spi_nor.c | 11 +++++++++--
+ 1 file changed, 9 insertions(+), 2 deletions(-)
+
+--- a/drivers/mtd/nor/spi_nor.c
++++ b/drivers/mtd/nor/spi_nor.c
+@@ -327,8 +327,15 @@ int spi_nor_read(unsigned int offset, ui
+
+ struct nor_device_info nor_flash_info_table[] = {
+ {"MX25L51245G", {0xC2, 0x20, 0x1A}, 0x4000000, 0},
+- {"W25Q256JW",{0xEF,0x80, 0x19}, 0x2000000, 0},
+- {"MX25U25635",{0xC2, 0x25, 0x39}, 0x2000000, 0}
++ {"W25Q256JV-IM", {0xEF, 0x70, 0x19}, 0x2000000, 0},
++ {"W25Q256JV-IQ", {0xEF, 0x40, 0x19}, 0x2000000, 0},
++ {"W25Q256JW", {0xEF, 0x60, 0x19}, 0x2000000, 0},
++ {"W25Q256JW-IM", {0xEF, 0x80, 0x19}, 0x2000000, 0},
++ {"W25Q512JV-IM", {0xEF, 0x70, 0x20}, 0x4000000, 0},
++ {"W25Q512JV-IQ", {0xEF, 0x40, 0x20}, 0x4000000, 0},
++ {"W25Q512NW-IM", {0xEF, 0x80, 0x20}, 0x4000000, 0},
++ {"W25Q512NW-IQ/IN", {0xEF, 0x60, 0x20}, 0x4000000, 0},
++ {"MX25U25635", {0xC2, 0x25, 0x39}, 0x2000000, 0}
+ };
+
+
--- /dev/null
+From 2a012775b3ab6e72091c8be1c2d4bf5972407eb5 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Sat, 27 Aug 2022 21:38:33 +0100
+Subject: [PATCH] mediatek: mt7622: initialize watchdog after DDR init
+
+Initializing the WDT before memory calibration breaks reboot at least
+on some MT7622 boards like the Bananapi BPi-R64:
+NOTICE: BL2: v2.7(release):OpenWrt v2022-08-18-9c9c4994-2 (mt7622-emmc-2ddr)
+NOTICE: BL2: Built : 04:00:25, Aug 27 2022
+ERROR: Cannot find any pass-window
+ERROR: no DATLAT taps pass, DATLAT calibration fail!
+ERROR: DATLAT calibration fail, write back to 20!
+ERROR: EMI: complex R/W mem test failed: -2
+
+Move watchdog initialization to happen only after memory initialization
+has completed to avoid the problem.
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ plat/mediatek/mt7622/bl2_plat_setup.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/plat/mediatek/mt7622/bl2_plat_setup.c
++++ b/plat/mediatek/mt7622/bl2_plat_setup.c
+@@ -277,7 +277,6 @@ void bl2_platform_setup(void)
+ plat_mt_cpuxgpt_init();
+ generic_delay_timer_init();
+
+- mtk_wdt_init();
+ mtk_pin_init();
+ #ifndef USING_BL2PL
+ mtk_pll_init();
+@@ -285,6 +284,7 @@ void bl2_platform_setup(void)
+ mtk_pwrap_init();
+ mtk_pmic_init();
+ mtk_mem_init();
++ mtk_wdt_init();
+
+ mtk_io_setup();
+ }
+++ /dev/null
---- a/plat/mediatek/mt7622/bl2_boot_snand.c
-+++ b/plat/mediatek/mt7622/bl2_boot_snand.c
-@@ -21,6 +21,10 @@
- #define FIP_BASE 0x80000
- #define FIP_SIZE 0x200000
-
-+#ifndef NMBM
-+#define SNAND_MAX_BAD_BLOCK 3
-+#endif
-+
- struct snfi_gpio_mux_info {
- const uint32_t *pins;
- uint32_t count;
-@@ -45,12 +49,26 @@ static size_t snand_read_range(int lba,
- size_t sizeremain = size, chunksize;
- uint64_t off = lba * cinfo.pagesize;
- uint8_t *ptr = (uint8_t *)buf;
-+ struct mtk_snand_chip_info info;
-+ unsigned int bad_blocks = 0;
- int ret = 0;
-
- if (!snf)
- return 0;
-
-+ ret = mtk_snand_get_chip_info(snf, &info);
-+ if (ret)
-+ return 0;
-+
- while (sizeremain) {
-+ while (mtk_snand_block_isbad(snf, off)) {
-+ if (bad_blocks > SNAND_MAX_BAD_BLOCK)
-+ return size - sizeremain;
-+
-+ off += info.blocksize;
-+ ++bad_blocks;
-+ }
-+
- chunksize = cinfo.pagesize;
- if (chunksize > sizeremain)
- chunksize = sizeremain;
projects / openwrt / staging / stintel.git / commitdiff