drm/amd/display: Update TTU properly

[Why]
We need to update TTU properly if DRAMClockChangeWatermark changes. If
TTU < DRAMClockChangeWatermark, we pstate won't be allowed and we will
hang in some PSR cases.

[How]
Update TTU if DramClockChangeWatermark value increases (only if TTU was
dependent on the watermark value on the DRAMClockChangeWatermark value
in the first place).

Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index 485a9c62ec586aa83bc12861fd9b091d3872be43..5bbbafacc72038c8e365727bc270220466f9cc81 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
@@ -2614,6 +2614,14 @@ static void dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP
 
        if (mode_lib->vba.DRAMClockChangeSupportsVActive &&
                        mode_lib->vba.MinActiveDRAMClockChangeMargin > 60) {
+
+               for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) {
+                       if (mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb] == 0) {
+                               if (mode_lib->vba.DRAMClockChangeWatermark >
+                               dml_max(mode_lib->vba.StutterEnterPlusExitWatermark, mode_lib->vba.UrgentWatermark))
+                                       mode_lib->vba.MinTTUVBlank[k] += 25;
+                       }
+               }
                mode_lib->vba.DRAMClockChangeWatermark += 25;
                mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;
        } else if (mode_lib->vba.DummyPStateCheck &&