struct ps2if *ps2if = dev_id;
unsigned int scancode, flag, status;
- status = sa1111_readl(ps2if->base + PS2STAT);
+ status = readl_relaxed(ps2if->base + PS2STAT);
while (status & PS2STAT_RXF) {
if (status & PS2STAT_STP)
- sa1111_writel(PS2STAT_STP, ps2if->base + PS2STAT);
+ writel_relaxed(PS2STAT_STP, ps2if->base + PS2STAT);
flag = (status & PS2STAT_STP ? SERIO_FRAME : 0) |
(status & PS2STAT_RXP ? 0 : SERIO_PARITY);
- scancode = sa1111_readl(ps2if->base + PS2DATA) & 0xff;
+ scancode = readl_relaxed(ps2if->base + PS2DATA) & 0xff;
if (hweight8(scancode) & 1)
flag ^= SERIO_PARITY;
serio_interrupt(ps2if->io, scancode, flag);
- status = sa1111_readl(ps2if->base + PS2STAT);
+ status = readl_relaxed(ps2if->base + PS2STAT);
}
return IRQ_HANDLED;
unsigned int status;
spin_lock(&ps2if->lock);
- status = sa1111_readl(ps2if->base + PS2STAT);
+ status = readl_relaxed(ps2if->base + PS2STAT);
if (ps2if->head == ps2if->tail) {
disable_irq_nosync(irq);
/* done */
} else if (status & PS2STAT_TXE) {
- sa1111_writel(ps2if->buf[ps2if->tail], ps2if->base + PS2DATA);
+ writel_relaxed(ps2if->buf[ps2if->tail], ps2if->base + PS2DATA);
ps2if->tail = (ps2if->tail + 1) & (sizeof(ps2if->buf) - 1);
}
spin_unlock(&ps2if->lock);
/*
* If the TX register is empty, we can go straight out.
*/
- if (sa1111_readl(ps2if->base + PS2STAT) & PS2STAT_TXE) {
- sa1111_writel(val, ps2if->base + PS2DATA);
+ if (readl_relaxed(ps2if->base + PS2STAT) & PS2STAT_TXE) {
+ writel_relaxed(val, ps2if->base + PS2DATA);
} else {
if (ps2if->head == ps2if->tail)
enable_irq(ps2if->tx_irq);
enable_irq_wake(ps2if->rx_irq);
- sa1111_writel(PS2CR_ENA, ps2if->base + PS2CR);
+ writel_relaxed(PS2CR_ENA, ps2if->base + PS2CR);
return 0;
}
{
struct ps2if *ps2if = io->port_data;
- sa1111_writel(0, ps2if->base + PS2CR);
+ writel_relaxed(0, ps2if->base + PS2CR);
disable_irq_wake(ps2if->rx_irq);
int maxread = 100;
while (maxread--) {
- if ((sa1111_readl(ps2if->base + PS2DATA) & 0xff) == 0xff)
+ if ((readl_relaxed(ps2if->base + PS2DATA) & 0xff) == 0xff)
break;
}
}
{
unsigned int val;
- sa1111_writel(PS2CR_ENA | mask, ps2if->base + PS2CR);
+ writel_relaxed(PS2CR_ENA | mask, ps2if->base + PS2CR);
udelay(2);
- val = sa1111_readl(ps2if->base + PS2STAT);
+ val = readl_relaxed(ps2if->base + PS2STAT);
return val & (PS2STAT_KBC | PS2STAT_KBD);
}
ret = -ENODEV;
}
- sa1111_writel(0, ps2if->base + PS2CR);
+ writel_relaxed(0, ps2if->base + PS2CR);
return ret;
}
sa1111_enable_device(ps2if->dev);
/* Incoming clock is 8MHz */
- sa1111_writel(0, ps2if->base + PS2CLKDIV);
- sa1111_writel(127, ps2if->base + PS2PRECNT);
+ writel_relaxed(0, ps2if->base + PS2CLKDIV);
+ writel_relaxed(127, ps2if->base + PS2PRECNT);
/*
* Flush any pending input.