mantis_risc_program(mantis);
mmwrite(mantis->risc_dma, MANTIS_RISC_START);
- mmwrite(mmread(MANTIS_GPIF_HIFADDR) | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_HIFADDR);
+ mmwrite(mmread(MANTIS_GPIF_ADDR) | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
mmwrite(0, MANTIS_DMA_CTL);
mantis->last_block = mantis->finished_block = 0;
mask = mmread(MANTIS_INT_MASK);
dprintk(verbose, MANTIS_DEBUG, 1, "Mantis Stop DMA engine");
- mmwrite((mmread(MANTIS_GPIF_HIFADDR) & (~(MANTIS_GPIF_HIFRDWRN))), MANTIS_GPIF_HIFADDR);
+ mmwrite((mmread(MANTIS_GPIF_ADDR) & (~(MANTIS_GPIF_HIFRDWRN))), MANTIS_GPIF_ADDR);
mmwrite((mmread(MANTIS_DMA_CTL) & ~(MANTIS_FIFO_EN |
MANTIS_DCAP_EN |
udelay(20);
- mmwrite(hif_addr, MANTIS_GPIF_HIFADDR);
+ mmwrite(hif_addr, MANTIS_GPIF_ADDR);
if (mantis_hif_data_available(ca) != 0) {
dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer burst read failed", mantis->num);
return -EREMOTEIO;
dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer operation failed", mantis->num);
return -EREMOTEIO;
}
- data = mmread(MANTIS_GPIF_HIFDIN);
+ data = mmread(MANTIS_GPIF_DIN);
return (data >> 24) & 0xff;
}
mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */
- mmwrite(hif_addr, MANTIS_GPIF_HIFADDR);
- mmwrite(data, MANTIS_GPIF_HIFDOUT);
+ mmwrite(hif_addr, MANTIS_GPIF_ADDR);
+ mmwrite(data, MANTIS_GPIF_DOUT);
ca->hif_job_queue = MANTIS_HIF_MEMWR;
if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
hif_addr |= MANTIS_GPIF_PCMCIAIOM;
hif_addr |= addr;
- mmwrite(hif_addr, MANTIS_GPIF_HIFADDR);
+ mmwrite(hif_addr, MANTIS_GPIF_ADDR);
ca->hif_job_queue = MANTIS_HIF_IOMRD;
if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
}
udelay(50);
ca->hif_job_queue &= ~MANTIS_HIF_IOMRD;
- data = mmread(MANTIS_GPIF_HIFDIN);
+ data = mmread(MANTIS_GPIF_DIN);
hif_addr |= MANTIS_GPIF_PCMCIAREG;
- mmwrite(hif_addr, MANTIS_GPIF_HIFADDR);
+ mmwrite(hif_addr, MANTIS_GPIF_ADDR);
return data;
}
hif_addr |= MANTIS_GPIF_PCMCIAIOM;
hif_addr |= addr;
- mmwrite(hif_addr, MANTIS_GPIF_HIFADDR);
- mmwrite(data, MANTIS_GPIF_HIFDOUT);
+ mmwrite(hif_addr, MANTIS_GPIF_ADDR);
+ mmwrite(data, MANTIS_GPIF_DOUT);
ca->hif_job_queue = MANTIS_HIF_IOMWR;
if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
udelay(50);
ca->hif_job_queue &= ~MANTIS_HIF_IOMWR;
hif_addr |= MANTIS_GPIF_PCMCIAREG;
- mmwrite(hif_addr, MANTIS_GPIF_HIFADDR);
+ mmwrite(hif_addr, MANTIS_GPIF_ADDR);
return 0;
}