ARM: dts: i.MX6UL: U-Boot specific dts for u-boot, dm-spl
authorJagan Teki <jagan@amarulasolutions.com>
Wed, 11 Apr 2018 12:32:22 +0000 (18:02 +0530)
committerStefano Babic <sbabic@denx.de>
Fri, 18 May 2018 06:23:43 +0000 (08:23 +0200)
u-boot,dm-spl property is specific to U-Boot, so move it into
*u-boot.dtsi files for relevant i.MX6UL files.

This make syncing Linux dts files straight forward.

Also update the MAINTAINERS file for dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi [new file with mode: 0644]
arch/arm/dts/imx6ul-geam-kit.dts
arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi [new file with mode: 0644]
arch/arm/dts/imx6ul-isiot-emmc.dts
arch/arm/dts/imx6ul-isiot-nand.dts
arch/arm/dts/imx6ul-isiot-u-boot.dtsi [new file with mode: 0644]
arch/arm/dts/imx6ul-isiot.dtsi
arch/arm/dts/imx6ul-u-boot.dtsi [new file with mode: 0644]
arch/arm/dts/imx6ul.dtsi
board/engicam/imx6ul/MAINTAINERS

diff --git a/arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi b/arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi
new file mode 100644 (file)
index 0000000..d1b77ba
--- /dev/null
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imx6ul-u-boot.dtsi"
+
+&usdhc1 {
+       u-boot,dm-spl;
+};
+
+&iomuxc {
+       pinctrl_usdhc1: usdhc1grp {
+               u-boot,dm-spl;
+       };
+
+       pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+               u-boot,dm-spl;
+       };
+
+       pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+               u-boot,dm-spl;
+       };
+};
index 15e3f9415383b06f40ab94aa398876b65e25da0b..07c21cb0a2de0202a87f39f64dc8c2a500b67e5e 100644 (file)
@@ -87,7 +87,6 @@
 };
 
 &usdhc1 {
-       u-boot,dm-spl;
        pinctrl-names = "default", "state_100mhz", "state_200mhz";
        pinctrl-0 = <&pinctrl_usdhc1>;
        pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
        };
 
        pinctrl_usdhc1: usdhc1grp {
-               u-boot,dm-spl;
                fsl,pins = <
                        MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x17059
                        MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x10059
        };
 
        pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
-               u-boot,dm-spl;
                fsl,pins = <
                        MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
                        MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
        };
 
        pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
-               u-boot,dm-spl;
                fsl,pins = <
                        MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
                        MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
diff --git a/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi b/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi
new file mode 100644 (file)
index 0000000..7d0cc15
--- /dev/null
@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imx6ul-isiot-u-boot.dtsi"
+
+&usdhc2 {
+       u-boot,dm-spl;
+};
index 588bebac47526f4f1d0800051511ff92893505bd..50ce2d798e6f34498af5b56b4c0cffcc4c1dc451 100644 (file)
@@ -42,6 +42,7 @@
 
 /dts-v1/;
 
+#include "imx6ul.dtsi"
 #include "imx6ul-isiot.dtsi"
 
 / {
index 12a35284285d8a175ed858b169d0d32346113f44..ffdaf34efb4b72e76ec23bb79703ed96c0d55d04 100644 (file)
@@ -42,6 +42,7 @@
 
 /dts-v1/;
 
+#include "imx6ul.dtsi"
 #include "imx6ul-isiot.dtsi"
 
 / {
diff --git a/arch/arm/dts/imx6ul-isiot-u-boot.dtsi b/arch/arm/dts/imx6ul-isiot-u-boot.dtsi
new file mode 100644 (file)
index 0000000..f98c395
--- /dev/null
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imx6ul-u-boot.dtsi"
+
+&usdhc1 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc1 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc2 {
+       u-boot,dm-spl;
+};
index e645c1265f337f4c98b3330e51150116b415daeb..4ed7313683d9e990b614053032bebd77274e25c4 100644 (file)
@@ -42,7 +42,6 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
-#include "imx6ul.dtsi"
 
 / {
        memory {
@@ -82,7 +81,6 @@
 };
 
 &usdhc1 {
-       u-boot,dm-spl;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usdhc1>;
        cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
        };
 
        pinctrl_usdhc1: usdhc1grp {
-               u-boot,dm-spl;
                fsl,pins = <
                        MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x17059
                        MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x10059
diff --git a/arch/arm/dts/imx6ul-u-boot.dtsi b/arch/arm/dts/imx6ul-u-boot.dtsi
new file mode 100644 (file)
index 0000000..08d7747
--- /dev/null
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+       soc {
+               u-boot,dm-spl;
+       };
+};
+
+&aips1 {
+       u-boot,dm-spl;
+};
+
+&gpio1 {
+       u-boot,dm-spl;
+};
+
+&gpio4 {
+       u-boot,dm-spl;
+};
+
+&iomuxc {
+       u-boot,dm-spl;
+};
+
+&aips2 {
+       u-boot,dm-spl;
+};
index d5ce3f13c241c953fb8da4d1fc5a8a058859f2d6..b33e6249774bad232392b1b94a1bc30c15850ffa 100644 (file)
                compatible = "simple-bus";
                interrupt-parent = <&gpc>;
                ranges;
-               u-boot,dm-spl;
 
                pmu {
                        compatible = "arm,cortex-a7-pmu";
                        #size-cells = <1>;
                        reg = <0x02000000 0x100000>;
                        ranges;
-                       u-boot,dm-spl;
 
                        spba-bus@02000000 {
                                compatible = "fsl,spba-bus", "simple-bus";
                                #interrupt-cells = <2>;
                                gpio-ranges = <&iomuxc  0 23 10>, <&iomuxc 10 17 6>,
                                              <&iomuxc 16 33 16>;
-                               u-boot,dm-spl;
                        };
 
                        gpio2: gpio@020a0000 {
                                interrupt-controller;
                                #interrupt-cells = <2>;
                                gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
-                               u-boot,dm-spl;
                        };
 
                        gpio5: gpio@020ac000 {
                        iomuxc: iomuxc@020e0000 {
                                compatible = "fsl,imx6ul-iomuxc";
                                reg = <0x020e0000 0x4000>;
-                               u-boot,dm-spl;
                        };
 
                        gpr: iomuxc-gpr@020e4000 {
                        #size-cells = <1>;
                        reg = <0x02100000 0x100000>;
                        ranges;
-                       u-boot,dm-spl;
 
                        usbotg1: usb@02184000 {
                                compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
index 73dbec88e246d114b604e8085cb53ae6a9f8f853..88db309aec1fbbbb1ef76e6c3bdb6f30cd0e7f99 100644 (file)
@@ -8,7 +8,12 @@ F:     configs/imx6ul_geam_nand_defconfig
 F:     configs/imx6ul_isiot_emmc_defconfig
 F:     configs/imx6ul_isiot_mmc_defconfig
 F:     configs/imx6ul_isiot_nand_defconfig
+F:     arch/arm/dts/imx6ul.dtsi
+F:     arch/arm/dts/imx6ul-u-boot.dtsi
 F:     arch/arm/dts/imx6ul-geam-kit.dts
+F:     arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi
 F:     arch/arm/dts/imx6ul-isiot.dtsi
+F:     arch/arm/dts/imx6ul-isiot-u-boot.dtsi
 F:     arch/arm/dts/imx6ul-isiot-emmc.dts
+F:     arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi
 F:     arch/arm/dts/imx6ul-isiot-nand.dts