--- /dev/null
+CONFIG_405EP=y
+CONFIG_405EX=y
+CONFIG_40x=y
+# CONFIG_44x is not set
+CONFIG_4xx=y
+CONFIG_4xx_SOC=y
+# CONFIG_6xx is not set
+# CONFIG_ACADIA is not set
+# CONFIG_ADVANCED_OPTIONS is not set
+# CONFIG_AGP is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_ARCH_SUPPORTS_MSI=y
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_AUDIT_ARCH=y
+CONFIG_BASE_SMALL=0
+# CONFIG_BINARY_PRINTF is not set
+CONFIG_BITREVERSE=y
+# CONFIG_BOOKE_WDT is not set
+CONFIG_BOUNCE=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd"
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CONSISTENT_SIZE=0x00200000
+# CONFIG_CPU_FREQ is not set
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DECOMPRESS_LZMA=y
+# CONFIG_DEFAULT_UIMAGE is not set
+CONFIG_DEVPORT=y
+CONFIG_DTC=y
+# CONFIG_E200 is not set
+CONFIG_EARLY_PRINTK=y
+# CONFIG_EDAC is not set
+# CONFIG_EP405 is not set
+CONFIG_EXTRA_TARGETS="uImage"
+CONFIG_FORCE_MAX_ZONEORDER=11
+# CONFIG_FSL_ULI1575 is not set
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_GENERIC_IOMAP is not set
+CONFIG_GENERIC_NVRAM=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_GENERIC_TIME_VSYSCALL=y
+# CONFIG_GEN_RTC is not set
+CONFIG_GPIOLIB=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+# CONFIG_HAS_RAPIDIO is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_HAVE_LMB=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+# CONFIG_HCU4 is not set
+# CONFIG_HVC_UDBG is not set
+CONFIG_HW_RANDOM=y
+CONFIG_HZ=250
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_I2C is not set
+CONFIG_IBM_NEW_EMAC=y
+# CONFIG_IBM_NEW_EMAC_DEBUG is not set
+CONFIG_IBM_NEW_EMAC_EMAC4=y
+CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32
+CONFIG_IBM_NEW_EMAC_RGMII=y
+CONFIG_IBM_NEW_EMAC_RXB=256
+CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256
+CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0
+CONFIG_IBM_NEW_EMAC_TXB=256
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_IOMMU_HELPER is not set
+# CONFIG_IPIC is not set
+# CONFIG_IRQSTACKS is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_ISA_DMA_API=y
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_KILAUEA=y
+# CONFIG_LEDS_GPIO is not set
+CONFIG_LOWMEM_SIZE=0x30000000
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_MAGICBOXV1=y
+CONFIG_MAGICBOXV2=y
+# CONFIG_MAKALU is not set
+# CONFIG_MATH_EMULATION is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+# CONFIG_MTD_CFI_GEOMETRY is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_OF_PARTS=y
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_NATSEMI is not set
+CONFIG_NOT_COHERENT_CACHE=y
+# CONFIG_NVRAM is not set
+CONFIG_OF=y
+CONFIG_OF_DEVICE=y
+CONFIG_OF_GPIO=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_PCI=y
+CONFIG_PCIEAER=y
+# CONFIG_PCIEASPM is not set
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_SYSCALL=y
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_PPC=y
+CONFIG_PPC32=y
+CONFIG_PPC40x_SIMPLE=y
+CONFIG_PPC4xx_PCI_EXPRESS=y
+# CONFIG_PPC64 is not set
+# CONFIG_PPC_16K_PAGES is not set
+# CONFIG_PPC_256K_PAGES is not set
+CONFIG_PPC_4K_PAGES=y
+# CONFIG_PPC_64K_PAGES is not set
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PPC_CLOCK is not set
+CONFIG_PPC_DCR=y
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_PPC_DCR_NATIVE=y
+# CONFIG_PPC_EARLY_DEBUG is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_PPC_MMU_NOHASH=y
+# CONFIG_PPC_MM_SLICES is not set
+# CONFIG_PPC_MPC106 is not set
+CONFIG_PPC_NEED_DMA_SYNC_OPS=y
+CONFIG_PPC_OF=y
+CONFIG_PPC_PCI_CHOICE=y
+# CONFIG_PPC_RTAS is not set
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_PQ2ADS is not set
+CONFIG_PRINT_STACK_DEPTH=64
+CONFIG_PROC_DEVICETREE=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_SCHED_HRTICK=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+# CONFIG_SERIAL_8250_RSA is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set
+# CONFIG_SIMPLE_GPIO is not set
+# CONFIG_SLOW_WORK is not set
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_TICK_ONESHOT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_WALNUT is not set
+CONFIG_WORD_SIZE=32
+# CONFIG_XILINX_SYSACE is not set
+# CONFIG_XILINX_VIRTEX_GENERIC_BOARD is not set
--- /dev/null
+--- a/arch/powerpc/boot/dts/kilauea.dts
++++ b/arch/powerpc/boot/dts/kilauea.dts
+@@ -150,15 +150,15 @@
+ #size-cells = <1>;
+ partition@0 {
+ label = "kernel";
+- reg = <0x00000000 0x00200000>;
++ reg = <0x00000000 0x001e0000>;
+ };
+- partition@200000 {
+- label = "root";
+- reg = <0x00200000 0x00200000>;
++ partition@1e0000 {
++ label = "device-tree";
++ reg = <0x001e0000 0x0020000>;
+ };
+- partition@400000 {
+- label = "user";
+- reg = <0x00400000 0x03b60000>;
++ partition@200000 {
++ label = "rootfs";
++ reg = <0x00200000 0x03d60000>;
+ };
+ partition@3f60000 {
+ label = "env";
--- /dev/null
+--- a/arch/powerpc/platforms/40x/kilauea.c
++++ b/arch/powerpc/platforms/40x/kilauea.c
+@@ -21,6 +21,8 @@
+ #include <asm/uic.h>
+ #include <asm/pci-bridge.h>
+ #include <asm/ppc4xx.h>
++#include <asm/dcr.h>
++#include <asm/dcr-regs.h>
+
+ static __initdata struct of_device_id kilauea_of_bus[] = {
+ { .compatible = "ibm,plb4", },
+@@ -46,6 +48,13 @@ static int __init kilauea_probe(void)
+
+ ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
+
++ /*
++ * 405EX(r) has SDR0_MFR[E0CS/E1CS] set after reset. This selects
++ * the internal loopback mode. Clear these bits so that both EMACs
++ * don't use loopback mode as deafult.
++ */
++ mtdcri(SDR0, SDR0_MFR, mfdcri(SDR0, SDR0_MFR) & ~0x0c000000);
++
+ return 1;
+ }
+
--- /dev/null
+--- /dev/null
++++ b/arch/powerpc/boot/cuboot-magicboxv1.c
+@@ -0,0 +1,40 @@
++/*
++ * Old U-boot compatibility for Magicbox v1
++ *
++ * Author: Imre Kaloz <kaloz@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include "ops.h"
++#include "io.h"
++#include "dcr.h"
++#include "stdio.h"
++#include "4xx.h"
++#include "44x.h"
++#include "cuboot.h"
++
++#define TARGET_4xx
++#define TARGET_405EP
++#include "ppcboot.h"
++
++static bd_t bd;
++
++static void magicboxv1_fixups(void)
++{
++ ibm405ep_fixup_clocks(25000000);
++ ibm4xx_sdram_fixup_memsize();
++ dt_fixup_mac_addresses(&bd.bi_enetaddr);
++}
++
++void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
++ unsigned long r6, unsigned long r7)
++{
++ CUBOOT_INIT();
++ platform_ops.fixups = magicboxv1_fixups;
++ platform_ops.exit = ibm40x_dbcr_reset;
++ fdt_init(_dtb_start);
++ serial_console_init();
++}
+--- /dev/null
++++ b/arch/powerpc/boot/dts/magicboxv1.dts
+@@ -0,0 +1,217 @@
++/*
++ * Device Tree Source for Magicbox v1
++ *
++ * Copyright 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ * Based on walnut.dts
++ *
++ * This file is licensed under the terms of the GNU General Public
++ * License version 2. This program is licensed "as is" without
++ * any warranty of any kind, whether express or implied.
++ */
++
++/dts-v1/;
++
++/ {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ model = "magicboxv1";
++ compatible = "magicboxv1";
++ dcr-parent = <&{/cpus/cpu@0}>;
++
++ aliases {
++ ethernet0 = &EMAC;
++ serial0 = &UART;
++ };
++
++ cpus {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ cpu@0 {
++ device_type = "cpu";
++ model = "PowerPC,405EP";
++ reg = <0x00000000>;
++ clock-frequency = <0xbebc200>; /* Filled in by zImage */
++ timebase-frequency = <0>; /* Filled in by zImage */
++ i-cache-line-size = <20>;
++ d-cache-line-size = <20>;
++ i-cache-size = <4000>;
++ d-cache-size = <4000>;
++ dcr-controller;
++ dcr-access-method = "native";
++ };
++ };
++
++ memory {
++ device_type = "memory";
++ reg = <0x00000000 0x00000000>; /* Filled in by zImage */
++ };
++
++ UIC0: interrupt-controller {
++ compatible = "ibm,uic";
++ interrupt-controller;
++ cell-index = <0>;
++ dcr-reg = <0x0c0 0x009>;
++ #address-cells = <0>;
++ #size-cells = <0>;
++ #interrupt-cells = <2>;
++ };
++
++ plb {
++ compatible = "ibm,plb3";
++ #address-cells = <1>;
++ #size-cells = <1>;
++ ranges;
++ clock-frequency = <0>; /* Filled in by zImage */
++
++ SDRAM0: memory-controller {
++ compatible = "ibm,sdram-405ep";
++ dcr-reg = <0x010 0x002>;
++ };
++
++ MAL: mcmal {
++ compatible = "ibm,mcmal-405ep", "ibm,mcmal";
++ dcr-reg = <0x180 0x062>;
++ num-tx-chans = <4>;
++ num-rx-chans = <2>;
++ interrupt-parent = <&UIC0>;
++ interrupts = <
++ 0xb 0x4 /* TXEOB */
++ 0xc 0x4 /* RXEOB */
++ 0xa 0x4 /* SERR */
++ 0xd 0x4 /* TXDE */
++ 0xe 0x4 /* RXDE */>;
++ };
++
++ POB0: opb {
++ compatible = "ibm,opb-405ep", "ibm,opb";
++ #address-cells = <1>;
++ #size-cells = <1>;
++ ranges = <0xef600000 0xef600000 0x00a00000>;
++ dcr-reg = <0x0a0 0x005>;
++ clock-frequency = <0>; /* Filled in by zImage */
++
++ UART: serial@ef600300 {
++ device_type = "serial";
++ compatible = "ns16550";
++ reg = <0xef600300 0x00000008>;
++ virtual-reg = <0xef600300>;
++ clock-frequency = <0>; /* Filled in by zImage */
++ current-speed = <115200>;
++ interrupt-parent = <&UIC0>;
++ interrupts = <0x0 0x4>;
++ };
++
++ IIC: i2c@ef600500 {
++ compatible = "ibm,iic-405ep", "ibm,iic";
++ reg = <0xef600500 0x00000011>;
++ interrupt-parent = <&UIC0>;
++ interrupts = <0x2 0x4>;
++ };
++
++ GPIO: gpio@ef600700 {
++ compatible = "ibm,gpio-405ep";
++ reg = <0xef600700 0x00000020>;
++ };
++
++ EMAC: ethernet@ef600800 {
++ linux,network-index = <0x0>;
++ device_type = "network";
++ compatible = "ibm,emac-405ep", "ibm,emac";
++ interrupt-parent = <&UIC0>;
++ interrupts = <
++ 0xf 0x4 /* Ethernet */
++ 0x9 0x4 /* Ethernet Wake Up */>;
++ local-mac-address = [000000000000]; /* Filled in by zImage */
++ reg = <0xef600800 0x00000070>;
++ mal-device = <&MAL>;
++ mal-tx-channel = <0>;
++ mal-rx-channel = <0>;
++ cell-index = <0>;
++ max-frame-size = <0x5dc>;
++ rx-fifo-size = <0x1000>;
++ tx-fifo-size = <0x800>;
++ phy-mode = "mii";
++ phy-map = <0x00000000>;
++ };
++
++ };
++
++ EBC0: ebc {
++ compatible = "ibm,ebc-405ep", "ibm,ebc";
++ dcr-reg = <0x012 0x002>;
++ #address-cells = <2>;
++ #size-cells = <1>;
++ /* The ranges property is supplied by the bootwrapper
++ * and is based on the firmware's configuration of the
++ * EBC bridge
++ */
++ clock-frequency = <0>; /* Filled in by zImage */
++
++ nor_flash@ffc00000 {
++ compatible = "cfi-flash";
++ bank-width = <2>;
++ reg = <0x00000000 0xffc00000 0x00400000>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++ partition@0 {
++ label = "linux";
++ reg = <0x0 0x3c0000>;
++ };
++ partition@100000 {
++ label = "rootfs";
++ reg = <0x100000 0x2c0000>;
++ };
++ partition@3c0000 {
++ label = "u-boot";
++ reg = <0x3c0000 0x30000>;
++ read-only;
++ };
++ };
++ };
++
++ PCI0: pci@ec000000 {
++ device_type = "pci";
++ #interrupt-cells = <1>;
++ #size-cells = <2>;
++ #address-cells = <3>;
++ compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
++ primary;
++ reg = <0xeec00000 0x00000008 /* Config space access */
++ 0xeed80000 0x00000004 /* IACK */
++ 0xeed80000 0x00000004 /* Special cycle */
++ 0xef480000 0x00000040>; /* Internal registers */
++
++ /* Outbound ranges, one memory and one IO,
++ * later cannot be changed. Chip supports a second
++ * IO range but we don't use it for now
++ */
++ ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
++ 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
++
++ /* Inbound 2GB range starting at 0 */
++ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
++
++ /* Magicbox v1 has all 4 IRQ pins tied together per slot */
++ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
++ interrupt-map = <
++ /* IDSEL 1 */
++ 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
++
++ /* IDSEL 2 */
++ 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
++
++ /* IDSEL 3 */
++ 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
++
++ /* IDSEL 4 */
++ 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
++ >;
++ };
++ };
++
++ chosen {
++ linux,stdout-path = "/plb/opb/serial@ef600300";
++ };
++};
+--- a/arch/powerpc/boot/Makefile
++++ b/arch/powerpc/boot/Makefile
+@@ -75,7 +75,7 @@ src-plat := of.c cuboot-52xx.c cuboot-82
+ cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
+ cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
+ virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
+- cuboot-acadia.c cuboot-amigaone.c
++ cuboot-acadia.c cuboot-amigaone.c cuboot-magicboxv1.c
+ src-boot := $(src-wlib) $(src-plat) empty.c
+
+ src-boot := $(addprefix $(obj)/, $(src-boot))
+@@ -192,6 +192,7 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImag
+ image-$(CONFIG_EP405) += dtbImage.ep405
+ image-$(CONFIG_WALNUT) += treeImage.walnut
+ image-$(CONFIG_ACADIA) += cuImage.acadia
++image-$(CONFIG_MAGICBOXV1) += cuImage.magicboxv1
+
+ # Board ports in arch/powerpc/platform/44x/Kconfig
+ image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
+--- a/arch/powerpc/platforms/40x/Kconfig
++++ b/arch/powerpc/platforms/40x/Kconfig
+@@ -49,6 +49,16 @@ config KILAUEA
+ help
+ This option enables support for the AMCC PPC405EX evaluation board.
+
++config MAGICBOXV1
++ bool "Magicbox v1"
++ depends on 40x
++ default n
++ select PPC40x_SIMPLE
++ select 405EP
++ select PCI
++ help
++ This option enables support for the Magicbox v1 board.
++
+ config MAKALU
+ bool "Makalu"
+ depends on 40x
+--- a/arch/powerpc/platforms/40x/ppc40x_simple.c
++++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
+@@ -51,7 +51,8 @@ machine_device_initcall(ppc40x_simple, p
+ * board.c file for it rather than adding it to this list.
+ */
+ static char *board[] __initdata = {
+- "amcc,acadia"
++ "amcc,acadia",
++ "magicboxv1"
+ };
+
+ static int __init ppc40x_probe(void)
--- /dev/null
+--- /dev/null
++++ b/arch/powerpc/boot/cuboot-magicboxv2.c
+@@ -0,0 +1,40 @@
++/*
++ * Old U-boot compatibility for Magicbox v2
++ *
++ * Author: Imre Kaloz <kaloz@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include "ops.h"
++#include "io.h"
++#include "dcr.h"
++#include "stdio.h"
++#include "4xx.h"
++#include "44x.h"
++#include "cuboot.h"
++
++#define TARGET_4xx
++#define TARGET_405EP
++#include "ppcboot.h"
++
++static bd_t bd;
++
++static void magicboxv2_fixups(void)
++{
++ ibm405ep_fixup_clocks(25000000);
++ ibm4xx_sdram_fixup_memsize();
++ dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
++}
++
++void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
++ unsigned long r6, unsigned long r7)
++{
++ CUBOOT_INIT();
++ platform_ops.fixups = magicboxv2_fixups;
++ platform_ops.exit = ibm40x_dbcr_reset;
++ fdt_init(_dtb_start);
++ serial_console_init();
++}
+--- /dev/null
++++ b/arch/powerpc/boot/dts/magicboxv2.dts
+@@ -0,0 +1,250 @@
++/*
++ * Device Tree Source for Magicbox v2
++ *
++ * Copyright 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ * Based on walnut.dts
++ *
++ * This file is licensed under the terms of the GNU General Public
++ * License version 2. This program is licensed "as is" without
++ * any warranty of any kind, whether express or implied.
++ */
++
++/dts-v1/;
++
++/ {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ model = "magicboxv2";
++ compatible = "magicboxv2";
++ dcr-parent = <&{/cpus/cpu@0}>;
++
++ aliases {
++ ethernet0 = &EMAC0;
++ ethernet1 = &EMAC1;
++ serial0 = &UART0;
++ serial1 = &UART1;
++ };
++
++ cpus {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ cpu@0 {
++ device_type = "cpu";
++ model = "PowerPC,405EP";
++ reg = <0x00000000>;
++ clock-frequency = <0xbebc200>; /* Filled in by zImage */
++ timebase-frequency = <0>; /* Filled in by zImage */
++ i-cache-line-size = <20>;
++ d-cache-line-size = <20>;
++ i-cache-size = <4000>;
++ d-cache-size = <4000>;
++ dcr-controller;
++ dcr-access-method = "native";
++ };
++ };
++
++ memory {
++ device_type = "memory";
++ reg = <0x00000000 0x00000000>; /* Filled in by zImage */
++ };
++
++ UIC0: interrupt-controller {
++ compatible = "ibm,uic";
++ interrupt-controller;
++ cell-index = <0>;
++ dcr-reg = <0x0c0 0x009>;
++ #address-cells = <0>;
++ #size-cells = <0>;
++ #interrupt-cells = <2>;
++ };
++
++ plb {
++ compatible = "ibm,plb3";
++ #address-cells = <1>;
++ #size-cells = <1>;
++ ranges;
++ clock-frequency = <0>; /* Filled in by zImage */
++
++ SDRAM0: memory-controller {
++ compatible = "ibm,sdram-405ep";
++ dcr-reg = <0x010 0x002>;
++ };
++
++ MAL: mcmal {
++ compatible = "ibm,mcmal-405ep", "ibm,mcmal";
++ dcr-reg = <0x180 0x062>;
++ num-tx-chans = <4>;
++ num-rx-chans = <2>;
++ interrupt-parent = <&UIC0>;
++ interrupts = <
++ 0xb 0x4 /* TXEOB */
++ 0xc 0x4 /* RXEOB */
++ 0xa 0x4 /* SERR */
++ 0xd 0x4 /* TXDE */
++ 0xe 0x4 /* RXDE */>;
++ };
++
++ POB0: opb {
++ compatible = "ibm,opb-405ep", "ibm,opb";
++ #address-cells = <1>;
++ #size-cells = <1>;
++ ranges = <0xef600000 0xef600000 0x00a00000>;
++ dcr-reg = <0x0a0 0x005>;
++ clock-frequency = <0>; /* Filled in by zImage */
++
++ UART0: serial@ef600300 {
++ device_type = "serial";
++ compatible = "ns16550";
++ reg = <0xef600300 0x00000008>;
++ virtual-reg = <0xef600300>;
++ clock-frequency = <0>; /* Filled in by zImage */
++ current-speed = <115200>;
++ interrupt-parent = <&UIC0>;
++ interrupts = <0x0 0x4>;
++ };
++
++ UART1: serial@ef600400 {
++ device_type = "serial";
++ compatible = "ns16550";
++ reg = <0xef600400 0x00000008>;
++ virtual-reg = <0xef600400>;
++ clock-frequency = <0>; /* Filled in by zImage */
++ current-speed = <115200>;
++ interrupt-parent = <&UIC0>;
++ interrupts = <0x1 0x4>;
++ };
++
++ IIC: i2c@ef600500 {
++ compatible = "ibm,iic-405ep", "ibm,iic";
++ reg = <0xef600500 0x00000011>;
++ interrupt-parent = <&UIC0>;
++ interrupts = <0x2 0x4>;
++ };
++
++ GPIO: gpio@ef600700 {
++ compatible = "ibm,gpio-405ep";
++ reg = <0xef600700 0x00000020>;
++ };
++
++ EMAC0: ethernet@ef600800 {
++ linux,network-index = <0x0>;
++ device_type = "network";
++ compatible = "ibm,emac-405ep", "ibm,emac";
++ interrupt-parent = <&UIC0>;
++ interrupts = <
++ 0xf 0x4 /* Ethernet */
++ 0x9 0x4 /* Ethernet Wake Up */>;
++ local-mac-address = [000000000000]; /* Filled in by zImage */
++ reg = <0xef600800 0x00000070>;
++ mal-device = <&MAL>;
++ mal-tx-channel = <0>;
++ mal-rx-channel = <0>;
++ cell-index = <0>;
++ max-frame-size = <0x5dc>;
++ rx-fifo-size = <0x1000>;
++ tx-fifo-size = <0x800>;
++ phy-mode = "mii";
++ phy-map = <0x00000000>;
++ };
++ EMAC1: ethernet@ef600900 {
++ linux,network-index = <0x1>;
++ device_type = "network";
++ compatible = "ibm,emac-405ep", "ibm,emac";
++ interrupt-parent = <&UIC0>;
++ interrupts = <
++ 0x11 0x4 /* Ethernet */
++ 0x09 0x4 /* Ethernet Wake Up */>;
++ local-mac-address = [000000000000]; /* Filled in by zImage */
++ reg = <0xef600900 0x00000070>;
++ mal-device = <&MAL>;
++ mal-tx-channel = <2>;
++ mal-rx-channel = <1>;
++ cell-index = <1>;
++ max-frame-size = <0x5dc>;
++ rx-fifo-size = <0x1000>;
++ tx-fifo-size = <0x800>;
++ mdio-device = <&EMAC0>;
++ phy-mode = "mii";
++ phy-map = <0x00000001>;
++ };
++
++ };
++
++ EBC0: ebc {
++ compatible = "ibm,ebc-405ep", "ibm,ebc";
++ dcr-reg = <0x012 0x002>;
++ #address-cells = <2>;
++ #size-cells = <1>;
++ /* The ranges property is supplied by the bootwrapper
++ * and is based on the firmware's configuration of the
++ * EBC bridge
++ */
++ clock-frequency = <0>; /* Filled in by zImage */
++
++ nor_flash@ffc00000 {
++ compatible = "cfi-flash";
++ bank-width = <2>;
++ reg = <0x00000000 0xffc00000 0x00400000>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++ partition@0 {
++ label = "linux";
++ reg = <0x0 0x3c0000>;
++ };
++ partition@100000 {
++ label = "rootfs";
++ reg = <0x100000 0x2c0000>;
++ };
++ partition@3c0000 {
++ label = "u-boot";
++ reg = <0x3c0000 0x30000>;
++ read-only;
++ };
++ };
++ };
++
++ PCI0: pci@ec000000 {
++ device_type = "pci";
++ #interrupt-cells = <1>;
++ #size-cells = <2>;
++ #address-cells = <3>;
++ compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
++ primary;
++ reg = <0xeec00000 0x00000008 /* Config space access */
++ 0xeed80000 0x00000004 /* IACK */
++ 0xeed80000 0x00000004 /* Special cycle */
++ 0xef480000 0x00000040>; /* Internal registers */
++
++ /* Outbound ranges, one memory and one IO,
++ * later cannot be changed. Chip supports a second
++ * IO range but we don't use it for now
++ */
++ ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
++ 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
++
++ /* Inbound 2GB range starting at 0 */
++ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
++
++ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
++ interrupt-map = <
++ /* IDSEL 1 */
++ 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
++
++ /* IDSEL 2 */
++ 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
++
++ /* IDSEL 3 */
++ 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
++
++ /* IDSEL 4 */
++ 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
++ >;
++ };
++ };
++
++ chosen {
++ linux,stdout-path = "/plb/opb/serial@ef600300";
++ };
++};
+--- a/arch/powerpc/boot/Makefile
++++ b/arch/powerpc/boot/Makefile
+@@ -75,7 +75,8 @@ src-plat := of.c cuboot-52xx.c cuboot-82
+ cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
+ cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
+ virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
+- cuboot-acadia.c cuboot-amigaone.c cuboot-magicboxv1.c
++ cuboot-acadia.c cuboot-amigaone.c cuboot-magicboxv1.c \
++ cuboot-magicboxv2.c
+ src-boot := $(src-wlib) $(src-plat) empty.c
+
+ src-boot := $(addprefix $(obj)/, $(src-boot))
+@@ -193,6 +194,7 @@ image-$(CONFIG_EP405) += dtbImage.ep40
+ image-$(CONFIG_WALNUT) += treeImage.walnut
+ image-$(CONFIG_ACADIA) += cuImage.acadia
+ image-$(CONFIG_MAGICBOXV1) += cuImage.magicboxv1
++image-$(CONFIG_MAGICBOXV2) += cuImage.magicboxv2
+
+ # Board ports in arch/powerpc/platform/44x/Kconfig
+ image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
+--- a/arch/powerpc/platforms/40x/Kconfig
++++ b/arch/powerpc/platforms/40x/Kconfig
+@@ -59,6 +59,16 @@ config MAGICBOXV1
+ help
+ This option enables support for the Magicbox v1 board.
+
++config MAGICBOXV2
++ bool "Magicbox v2"
++ depends on 40x
++ default n
++ select PPC40x_SIMPLE
++ select 405EP
++ select PCI
++ help
++ This option enables support for the Magicbox v2 board.
++
+ config MAKALU
+ bool "Makalu"
+ depends on 40x
+--- a/arch/powerpc/platforms/40x/ppc40x_simple.c
++++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
+@@ -52,7 +52,8 @@ machine_device_initcall(ppc40x_simple, p
+ */
+ static char *board[] __initdata = {
+ "amcc,acadia",
+- "magicboxv1"
++ "magicboxv1",
++ "magicboxv2",
+ };
+
+ static int __init ppc40x_probe(void)
projects / openwrt / staging / lynxis.git / commitdiff