According to the datasheet:
BIT 2:1
VMID_SEL[1:0] VMID Divider Enable and Select
00 = VMID disabled
01 = 2x40k Omh divider
10 = 2x240k Omh divider
11 = 2x5k Omh divider
To set VMID 2*240k, we should OR reg with 0x04 instead of 0x40.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
/* VMID 2*240k */
reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1);
reg &= ~WM9081_VMID_SEL_MASK;
- reg |= 0x40;
+ reg |= 0x04;
snd_soc_write(codec, WM9081_VMID_CONTROL, reg);
/* Standby bias current on */