/*
- * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
/* CPU state ids - implementation defined */
#define DENVER_CPU_STATE_POWER_DOWN 0x3
+#ifndef __ASSEMBLY__
+
+/* Disable Dynamic Code Optimisation */
+void denver_disable_dco(void);
+
+#endif
+
#endif /* __DENVER_H__ */
/*
- * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
#include <cpu_macros.S>
#include <plat_macros.S>
+ .global denver_disable_dco
+
/* ---------------------------------------------
* Disable debug interfaces
* ---------------------------------------------
mov x19, x30
- /* ----------------------------------------------------
- * We enter the 'core power gated with ARM state not
- * retained' power state during CPU power down. We let
- * DCO know that we expect to enter this power state
- * by writing to the ACTLR_EL1 register.
- * ----------------------------------------------------
- */
- mov x0, #DENVER_CPU_STATE_POWER_DOWN
- msr actlr_el1, x0
-
- /* ---------------------------------------------
- * Force DCO to be quiescent
- * ---------------------------------------------
- */
- bl denver_disable_dco
-
/* ---------------------------------------------
* Force the debug interfaces to be quiescent
* ---------------------------------------------
int tegra_soc_pwr_domain_off(const psci_power_state_t *target_state)
{
tegra_fc_cpu_off(read_mpidr() & MPIDR_CPU_MASK);
+
+ /* Disable DCO operations */
+ denver_disable_dco();
+
+ /* Power down the CPU */
+ write_actlr_el1(DENVER_CPU_STATE_POWER_DOWN);
+
return PSCI_E_SUCCESS;
}
/* Program FC to enter suspend state */
tegra_fc_cpu_powerdn(read_mpidr());
- /* Suspend DCO operations */
+ /* Disable DCO operations */
+ denver_disable_dco();
+
+ /* Program the suspend state ID */
write_actlr_el1(target_state->pwr_domain_state[PLAT_MAX_PWR_LVL]);
return PSCI_E_SUCCESS;