powerpc/eeh: Add include_passed to eeh_pe_state_clear()
authorSam Bobroff <sbobroff@linux.ibm.com>
Thu, 29 Nov 2018 03:16:39 +0000 (14:16 +1100)
committerMichael Ellerman <mpe@ellerman.id.au>
Tue, 5 Feb 2019 00:55:43 +0000 (11:55 +1100)
Add a parameter to eeh_pe_state_clear() that allows passed-through PEs
to be excluded. Update callers to always pass true so that there is no
change in behaviour.

Also refactor to use direct traversal, to allow the removal of some
boilerplate.

This is to prepare for follow-up work for passed-through devices.

Signed-off-by: Sam Bobroff <sbobroff@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/ppc-pci.h
arch/powerpc/kernel/eeh.c
arch/powerpc/kernel/eeh_driver.c
arch/powerpc/kernel/eeh_pe.c
arch/powerpc/kernel/eeh_sysfs.c

index f67da277d6526635eea2e34436a5fbe995b1b7a6..08e094eaeccf725b525928a58e314ce356da3882 100644 (file)
@@ -59,7 +59,7 @@ int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
 int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
 void eeh_pe_state_mark(struct eeh_pe *pe, int state);
 void eeh_pe_mark_isolated(struct eeh_pe *pe);
-void eeh_pe_state_clear(struct eeh_pe *pe, int state);
+void eeh_pe_state_clear(struct eeh_pe *pe, int state, bool include_passed);
 void eeh_pe_state_mark_with_cfg(struct eeh_pe *pe, int state);
 void eeh_pe_dev_mode_mark(struct eeh_pe *pe, int mode);
 
index c56537d030172721ca61010ef5c16e8323743ef4..8d32587b07dca5096569882d67cc84c0d4c47642 100644 (file)
@@ -825,13 +825,13 @@ int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state stat
                eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
                eeh_unfreeze_pe(pe);
                if (!(pe->type & EEH_PE_VF))
-                       eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
+                       eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED, true);
                eeh_pe_dev_traverse(pe, eeh_restore_dev_state, dev);
-               eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
+               eeh_pe_state_clear(pe, EEH_PE_ISOLATED, true);
                break;
        case pcie_hot_reset:
                eeh_pe_mark_isolated(pe);
-               eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
+               eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED, true);
                eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
                eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
                if (!(pe->type & EEH_PE_VF))
@@ -840,7 +840,7 @@ int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state stat
                break;
        case pcie_warm_reset:
                eeh_pe_mark_isolated(pe);
-               eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
+               eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED, true);
                eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
                eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
                if (!(pe->type & EEH_PE_VF))
@@ -848,7 +848,7 @@ int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state stat
                eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
                break;
        default:
-               eeh_pe_state_clear(pe, EEH_PE_ISOLATED | EEH_PE_CFG_BLOCKED);
+               eeh_pe_state_clear(pe, EEH_PE_ISOLATED | EEH_PE_CFG_BLOCKED, true);
                return -EINVAL;
        };
 
@@ -936,7 +936,7 @@ int eeh_pe_reset_full(struct eeh_pe *pe)
                        __func__, state, pe->phb->global_number, pe->addr, (i + 1));
        }
 
-       eeh_pe_state_clear(pe, reset_state);
+       eeh_pe_state_clear(pe, reset_state, true);
        return ret;
 }
 
@@ -1380,7 +1380,7 @@ static int eeh_pe_change_owner(struct eeh_pe *pe)
 
        ret = eeh_unfreeze_pe(pe);
        if (!ret)
-               eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
+               eeh_pe_state_clear(pe, EEH_PE_ISOLATED, true);
        return ret;
 }
 
@@ -1640,7 +1640,7 @@ static int eeh_pe_reenable_devices(struct eeh_pe *pe)
        /* The PE is still in frozen state */
        ret = eeh_unfreeze_pe(pe);
        if (!ret)
-               eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
+               eeh_pe_state_clear(pe, EEH_PE_ISOLATED, true);
        return ret;
 }
 
@@ -1668,7 +1668,7 @@ int eeh_pe_reset(struct eeh_pe *pe, int option)
        switch (option) {
        case EEH_RESET_DEACTIVATE:
                ret = eeh_ops->reset(pe, option);
-               eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
+               eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED, true);
                if (ret)
                        break;
 
index 5303429ac0e3a861d5c81cf336d435bdfe9b37ef..997aba0fe59336db25832428087b5eb1b0d1a8a9 100644 (file)
@@ -603,7 +603,7 @@ static int eeh_clear_pe_frozen_state(struct eeh_pe *root)
                if (i >= 3)
                        return -EIO;
        }
-       eeh_pe_state_clear(root, EEH_PE_ISOLATED);
+       eeh_pe_state_clear(root, EEH_PE_ISOLATED, true);
        return 0;
 }
 
@@ -624,14 +624,14 @@ int eeh_pe_reset_and_recover(struct eeh_pe *pe)
        /* Issue reset */
        ret = eeh_pe_reset_full(pe);
        if (ret) {
-               eeh_pe_state_clear(pe, EEH_PE_RECOVERING);
+               eeh_pe_state_clear(pe, EEH_PE_RECOVERING, true);
                return ret;
        }
 
        /* Unfreeze the PE */
        ret = eeh_clear_pe_frozen_state(pe);
        if (ret) {
-               eeh_pe_state_clear(pe, EEH_PE_RECOVERING);
+               eeh_pe_state_clear(pe, EEH_PE_RECOVERING, true);
                return ret;
        }
 
@@ -639,7 +639,7 @@ int eeh_pe_reset_and_recover(struct eeh_pe *pe)
        eeh_pe_dev_traverse(pe, eeh_dev_restore_state, NULL);
 
        /* Clear recovery mode */
-       eeh_pe_state_clear(pe, EEH_PE_RECOVERING);
+       eeh_pe_state_clear(pe, EEH_PE_RECOVERING, true);
 
        return 0;
 }
@@ -730,11 +730,11 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus,
                        eeh_add_virt_device(edev);
                } else {
                        if (!driver_eeh_aware)
-                               eeh_pe_state_clear(pe, EEH_PE_PRI_BUS);
+                               eeh_pe_state_clear(pe, EEH_PE_PRI_BUS, true);
                        pci_hp_add_devices(bus);
                }
        }
-       eeh_pe_state_clear(pe, EEH_PE_KEEP);
+       eeh_pe_state_clear(pe, EEH_PE_KEEP, true);
 
        pe->tstamp = tstamp;
        pe->freeze_count = cnt;
@@ -886,7 +886,7 @@ void eeh_handle_normal_event(struct eeh_pe *pe)
                         * is still in frozen state. Clear it before
                         * resuming the PE.
                         */
-                       eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
+                       eeh_pe_state_clear(pe, EEH_PE_ISOLATED, true);
                        result = PCI_ERS_RESULT_RECOVERED;
                }
        }
@@ -963,7 +963,7 @@ void eeh_handle_normal_event(struct eeh_pe *pe)
                        eeh_pe_dev_traverse(pe, eeh_rmv_device, NULL);
                        eeh_pe_dev_mode_mark(pe, EEH_DEV_REMOVED);
                } else {
-                       eeh_pe_state_clear(pe, EEH_PE_PRI_BUS);
+                       eeh_pe_state_clear(pe, EEH_PE_PRI_BUS, true);
                        eeh_pe_dev_mode_mark(pe, EEH_DEV_REMOVED);
 
                        pci_lock_rescan_remove();
@@ -973,7 +973,7 @@ void eeh_handle_normal_event(struct eeh_pe *pe)
                        return;
                }
        }
-       eeh_pe_state_clear(pe, EEH_PE_RECOVERING);
+       eeh_pe_state_clear(pe, EEH_PE_RECOVERING, true);
 }
 
 /**
@@ -1055,7 +1055,7 @@ void eeh_handle_special_event(void)
                                        continue;
 
                                /* Notify all devices to be down */
-                               eeh_pe_state_clear(pe, EEH_PE_PRI_BUS);
+                               eeh_pe_state_clear(pe, EEH_PE_PRI_BUS, true);
                                eeh_set_channel_state(pe, pci_channel_io_perm_failure);
                                eeh_pe_report(
                                        "error_detected(permanent failure)", pe,
index 6fa2032e05945e1fd5f858e0d37bc3040b0316e7..8b578891f27c2f237c85ad2c0381209203b80a86 100644 (file)
@@ -657,62 +657,52 @@ void eeh_pe_dev_mode_mark(struct eeh_pe *pe, int mode)
 }
 
 /**
- * __eeh_pe_state_clear - Clear state for the PE
+ * eeh_pe_state_clear - Clear state for the PE
  * @data: EEH PE
- * @flag: state
+ * @state: state
+ * @include_passed: include passed-through devices?
  *
  * The function is used to clear the indicated state from the
  * given PE. Besides, we also clear the check count of the PE
  * as well.
  */
-static void *__eeh_pe_state_clear(struct eeh_pe *pe, void *flag)
+void eeh_pe_state_clear(struct eeh_pe *root, int state, bool include_passed)
 {
-       int state = *((int *)flag);
+       struct eeh_pe *pe;
        struct eeh_dev *edev, *tmp;
        struct pci_dev *pdev;
 
-       /* Keep the state of permanently removed PE intact */
-       if (pe->state & EEH_PE_REMOVED)
-               return NULL;
+       eeh_for_each_pe(root, pe) {
+               /* Keep the state of permanently removed PE intact */
+               if (pe->state & EEH_PE_REMOVED)
+                       continue;
 
-       pe->state &= ~state;
+               if (!include_passed && eeh_pe_passed(pe))
+                       continue;
 
-       /*
-        * Special treatment on clearing isolated state. Clear
-        * check count since last isolation and put all affected
-        * devices to normal state.
-        */
-       if (!(state & EEH_PE_ISOLATED))
-               return NULL;
+               pe->state &= ~state;
 
-       pe->check_count = 0;
-       eeh_pe_for_each_dev(pe, edev, tmp) {
-               pdev = eeh_dev_to_pci_dev(edev);
-               if (!pdev)
+               /*
+                * Special treatment on clearing isolated state. Clear
+                * check count since last isolation and put all affected
+                * devices to normal state.
+                */
+               if (!(state & EEH_PE_ISOLATED))
                        continue;
 
-               pdev->error_state = pci_channel_io_normal;
-       }
-
-       /* Unblock PCI config access if required */
-       if (pe->state & EEH_PE_CFG_RESTRICTED)
-               pe->state &= ~EEH_PE_CFG_BLOCKED;
+               pe->check_count = 0;
+               eeh_pe_for_each_dev(pe, edev, tmp) {
+                       pdev = eeh_dev_to_pci_dev(edev);
+                       if (!pdev)
+                               continue;
 
-       return NULL;
-}
+                       pdev->error_state = pci_channel_io_normal;
+               }
 
-/**
- * eeh_pe_state_clear - Clear state for the PE and its children
- * @pe: PE
- * @state: state to be cleared
- *
- * When the PE and its children has been recovered from error,
- * we need clear the error state for that. The function is used
- * for the purpose.
- */
-void eeh_pe_state_clear(struct eeh_pe *pe, int state)
-{
-       eeh_pe_traverse(pe, __eeh_pe_state_clear, &state);
+               /* Unblock PCI config access if required */
+               if (pe->state & EEH_PE_CFG_RESTRICTED)
+                       pe->state &= ~EEH_PE_CFG_BLOCKED;
+       }
 }
 
 /*
index 0731d2f01dd9df51b0b167e66f9169e3c18d40d5..3fa04dda17371ad257164a52b2e951a37e54416f 100644 (file)
@@ -84,7 +84,7 @@ static ssize_t eeh_pe_state_store(struct device *dev,
 
        if (eeh_unfreeze_pe(edev->pe))
                return -EIO;
-       eeh_pe_state_clear(edev->pe, EEH_PE_ISOLATED);
+       eeh_pe_state_clear(edev->pe, EEH_PE_ISOLATED, true);
 
        return count;
 }