mips: dts: mscc: Add spi on Ocelot
authorAlexandre Belloni <alexandre.belloni@bootlin.com>
Tue, 31 Jul 2018 14:38:54 +0000 (16:38 +0200)
committerPaul Burton <paul.burton@mips.com>
Tue, 31 Jul 2018 17:34:08 +0000 (10:34 -0700)
Add support for the SPI controller

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20101/
Cc: Mark Brown <broonie@kernel.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-spi@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Allan Nielsen <allan.nielsen@microsemi.com>
arch/mips/boot/dts/mscc/ocelot.dtsi

index afe8fc9011eaeabff9fd0a47f6e4dbc7df8c8a68..f7eb612b46ba81348aa8311088af817dc2df5d08 100644 (file)
                        status = "disabled";
                };
 
+               spi: spi@101000 {
+                       compatible = "mscc,ocelot-spi", "snps,dw-apb-ssi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x101000 0x100>, <0x3c 0x18>;
+                       interrupts = <9>;
+                       clocks = <&ahb_clk>;
+
+                       status = "disabled";
+               };
+
                switch@1010000 {
                        compatible = "mscc,vsc7514-switch";
                        reg = <0x1010000 0x10000>,