DaVinci: correct MDSTAT.STATE mask

MDSTAT.STATE occupies bits 0..5 according to all available documentation, so fix
the mask which previously was leaving out the intermediate state indicator bit.

While at it, introduce two #define's for that mask -- unfortunately, we can't
use a single #define as the assembly code can't include <asm/arch/hardware.h>
due to C-specfic constructs in it.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

diff --git a/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S b/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S
index 0a4b2cf674db80008fd36fae32ef993fce800a65..7a169b107677e58edc59fc2f4ef81ea3417ab7a8 100644 (file)
--- a/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S
+++ b/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S
@@ -45,6 +45,8 @@
 
 #include <config.h>
 
+#define MDSTAT_STATE   0x3f
+
 .globl lowlevel_init
 lowlevel_init:
 
@@ -268,7 +270,7 @@ checkStatClkStop:
 checkDDRStatClkStop:
        ldr     r6, MDSTAT_DDR2
        ldr     r7, [r6]
-       and     r7, r7, $0x1f
+       and     r7, r7, $MDSTAT_STATE
        cmp     r7, $0x03
        bne     checkDDRStatClkStop
 
@@ -343,7 +345,7 @@ checkStatClkStop2:
 checkDDRStatClkStop2:
        ldr     r6, MDSTAT_DDR2
        ldr     r7, [r6]
-       and     r7, r7, $0x1f
+       and     r7, r7, $MDSTAT_STATE
        cmp     r7, $0x01
        bne     checkDDRStatClkStop2
 
@@ -374,7 +376,7 @@ checkStatClkEn2:
 checkDDRStatClkEn2:
        ldr     r6, MDSTAT_DDR2
        ldr     r7, [r6]
-       and     r7, r7, $0x1f
+       and     r7, r7, $MDSTAT_STATE
        cmp     r7, $0x03
        bne     checkDDRStatClkEn2
 

diff --git a/arch/arm/cpu/arm926ejs/davinci/psc.c b/arch/arm/cpu/arm926ejs/davinci/psc.c
index 8273a7fae4e96273cb5cade22f53d5db40a1da41..707fa47e319b2d4637ca68c1dd9e4deaf200d783 100644 (file)
--- a/arch/arm/cpu/arm926ejs/davinci/psc.c
+++ b/arch/arm/cpu/arm926ejs/davinci/psc.c
@@ -83,7 +83,7 @@ void lpsc_on(unsigned int id)
        while (readl(ptstat) & 0x01)
                continue;
 
-       if ((readl(mdstat) & 0x1f) == 0x03)
+       if ((readl(mdstat) & PSC_MDSTAT_STATE) == 0x03)
                return; /* Already on and enabled */
 
        writel(readl(mdctl) | 0x03, mdctl);
@@ -114,7 +114,7 @@ void lpsc_on(unsigned int id)
 
        while (readl(ptstat) & 0x01)
                continue;
-       while ((readl(mdstat) & 0x1f) != 0x03)
+       while ((readl(mdstat) & PSC_MDSTAT_STATE) != 0x03)
                continue;
 }
 

diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h
index b6a3209ff96d16cfd1b4606ff1fb437b47b94799..8e7b847f5315277867c10c9ff39fc3741966f1d8 100644 (file)
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -356,6 +356,8 @@ struct davinci_psc_regs {
 
 #endif /* CONFIG_SOC_DA8XX */
 
+#define PSC_MDSTAT_STATE               0x3f
+
 #ifndef CONFIG_SOC_DA8XX
 
 /* Miscellania... */