- Remove references to removed build options.
- Remove support for LOAD_IMAGE_V2=0.
Change-Id: I296385ef2ebf829446c76a54400d73f963ed265f
Tested-by: Nariman Poushin <nariman.poushin@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
#define PLAT_MAX_PWR_LVL U(1)
-#define PLAT_ARM_G1S_IRQS ARM_G1S_IRQS, \
- CSS_IRQ_MHU
-
-#define PLAT_ARM_G0_IRQS ARM_G0_IRQS
-
#define PLAT_ARM_G1S_IRQ_PROPS(grp) CSS_G1S_IRQ_PROPS(grp)
#define PLAT_ARM_G0_IRQ_PROPS(grp) ARM_G0_IRQ_PROPS(grp)
#ifndef __SGI_PLAT_CONFIG_H__
#define __SGI_PLAT_CONFIG_H__
-#include <arm_gic.h>
#include <ccn.h>
#include <gicv3.h>
CSS_USE_SCMI_SDS_DRIVER := 1
-ENABLE_PLAT_COMPAT := 0
-
CSS_ENT_BASE := plat/arm/css/sgi
RAS_EXTENSION := 0
#if ENABLE_SPM
ARM_SP_IMAGE_MMAP,
#endif
-#if TRUSTED_BOARD_BOOT && LOAD_IMAGE_V2 && !BL2_AT_EL3
+#if TRUSTED_BOARD_BOOT && !BL2_AT_EL3
ARM_MAP_BL1_RW,
#endif
{0}
}
#endif /* ENABLE_SPM && defined(IMAGE_BL31) */
-#if TRUSTED_BOARD_BOOT && LOAD_IMAGE_V2
+#if TRUSTED_BOARD_BOOT
int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
{
assert(heap_addr != NULL);
#ifndef __SGM_PLAT_CONFIG_H__
#define __SGM_PLAT_CONFIG_H__
-#include <arm_gic.h>
#include <ccn.h>
#include <gicv3.h>
# sgm uses CCI-500 as Cache Coherent Interconnect
ARM_CCI_PRODUCT_ID := 500
-# Disable the PSCI platform compatibility layer
-ENABLE_PLAT_COMPAT := 0
-
# System coherency is managed in hardware
HW_ASSISTED_COHERENCY := 1
#ifdef SPD_opteed
ARM_OPTEE_PAGEABLE_LOAD_MEM,
#endif
-#if TRUSTED_BOARD_BOOT && LOAD_IMAGE_V2 && !BL2_AT_EL3
+#if TRUSTED_BOARD_BOOT && !BL2_AT_EL3
ARM_MAP_BL1_RW,
#endif
{0}
return css_plat_info;
}
-#if TRUSTED_BOARD_BOOT && LOAD_IMAGE_V2
+#if TRUSTED_BOARD_BOOT
int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
{
assert(heap_addr != NULL);