drm/amd/display: Add driver support for enabling PSR on DMCUB

[Why]
We want to be able to enable PSR on DMCUB, and fallback to
DMCU when necessary.

[How]
Add infrastructure to enable and disable PSR on DMCUB.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 3420d098d77142dd37fdfdbe7d0e20e7145308e7..2ccc2db93f5dbacdfcd12eaa77856260178d5375 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -45,7 +45,7 @@
 #include "dpcd_defs.h"
 #include "dmcu.h"
 #include "hw/clk_mgr.h"
-#include "../dce/dmub_psr.h"
+#include "dce/dmub_psr.h"
 
 #define DC_LOGGER_INIT(logger)
 
@@ -2433,7 +2433,7 @@ bool dc_link_set_psr_allow_active(struct dc_link *link, bool allow_active, bool
        struct dmcu *dmcu = dc->res_pool->dmcu;
        struct dmub_psr *psr = dc->res_pool->psr;
 
-       if ((psr != NULL) && link->psr_feature_enabled)
+       if (psr != NULL && link->psr_feature_enabled)
                psr->funcs->psr_enable(psr, allow_active);
        else if ((dmcu != NULL && dmcu->funcs->is_dmcu_initialized(dmcu)) && link->psr_feature_enabled)
                dmcu->funcs->set_psr_enable(dmcu, allow_active, wait);

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index f8ee2b75d2b8b09cab83094d4e2fa884ce30cb4a..e10d5a7d0cb843874e0b0902667b18c3ae89b081 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -410,6 +410,7 @@ struct dc_debug_options {
        bool dmub_offload_enabled;
        bool dmcub_emulation;
        bool dmub_command_table; /* for testing only */
+       bool psr_on_dmub;
        struct dc_bw_validation_profile bw_val_profile;
        bool disable_fec;
        bool disable_48mhz_pwrdwn;

diff --git a/drivers/gpu/drm/amd/display/dc/dc_link.h b/drivers/gpu/drm/amd/display/dc/dc_link.h
index 5f341e960506f8bb906d297cc9c7c9da7be1ce15..c45c7680fa58186a6abbc04effd8195702b67572 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_link.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_link.h
@@ -26,6 +26,7 @@
 #ifndef DC_LINK_H_
 #define DC_LINK_H_
 
+#include "dc.h"
 #include "dc_types.h"
 #include "grph_object_defs.h"
 

diff --git a/drivers/gpu/drm/amd/display/dc/dce/Makefile b/drivers/gpu/drm/amd/display/dc/dce/Makefile
index fdf3d8f87eeefd23e3cd6f318b3c2aca9932594d..fbfcff700971cae06a816eb2463d9b555a018df1 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dce/Makefile
@@ -29,7 +29,7 @@
 DCE = dce_audio.o dce_stream_encoder.o dce_link_encoder.o dce_hwseq.o \
 dce_mem_input.o dce_clock_source.o dce_scl_filters.o dce_transform.o \
 dce_opp.o dce_dmcu.o dce_abm.o dce_ipp.o dce_aux.o \
-dce_i2c.o dce_i2c_hw.o dce_i2c_sw.o
+dce_i2c.o dce_i2c_hw.o dce_i2c_sw.o dmub_psr.o
 
 AMD_DAL_DCE = $(addprefix $(AMDDALPATH)/dc/dce/,$(DCE))
 

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
index 22cd68f7dca005de73a67695c1440b255d10b281..2c932c29f1f9ede11ccc915d6a7139a1abccdd00 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
@@ -27,7 +27,7 @@
 #include "dc.h"
 #include "dc_dmub_srv.h"
 #include "../../dmub/inc/dmub_srv.h"
-#include "dmub_fw_state.h"
+#include "../../dmub/inc/dmub_gpint_cmd.h"
 #include "core_types.h"
 
 #define MAX_PIPES 6
@@ -131,8 +131,9 @@ static bool dmub_psr_copy_settings(struct dmub_psr *dmub,
                = &cmd.psr_copy_settings.psr_copy_settings_data;
        struct pipe_ctx *pipe_ctx = NULL;
        struct resource_context *res_ctx = &link->ctx->dc->current_state->res_ctx;
+       int i = 0;
 
-       for (int i = 0; i < MAX_PIPES; i++) {
+       for (i = 0; i < MAX_PIPES; i++) {
                if (res_ctx &&
                        res_ctx->pipe_ctx[i].stream &&
                        res_ctx->pipe_ctx[i].stream->link &&

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h
index 3de7b9439f42dd64a0197370e7003f6aab154414..f404fecd6410da83ed00e0dd63297a8472413011 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h
@@ -27,6 +27,7 @@
 #define _DMUB_PSR_H_
 
 #include "os_types.h"
+#include "dc_link.h"
 
 struct dmub_psr {
        struct dc_context *ctx;
@@ -44,4 +45,4 @@ struct dmub_psr *dmub_psr_create(struct dc_context *ctx);
 void dmub_psr_destroy(struct dmub_psr **dmub);
 
 
-#endif /* _DCE_DMUB_H_ */
+#endif /* _DMUB_PSR_H_ */

diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
index e7076b0d7afbe7449bc35d78a9b658958f621a74..f453de10aa2d5e6afaa0a87c21c4ea87979632aa 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
@@ -84,7 +84,7 @@
 #include "dcn21_resource.h"
 #include "vm_helper.h"
 #include "dcn20/dcn20_vmid.h"
-#include "../dce/dmub_psr.h"
+#include "dce/dmub_psr.h"
 
 #define SOC_BOUNDING_BOX_VALID false
 #define DC_LOGGER_INIT(logger)
@@ -995,6 +995,9 @@ static void dcn21_resource_destruct(struct dcn21_resource_pool *pool)
        if (pool->base.dmcu != NULL)
                dce_dmcu_destroy(&pool->base.dmcu);
 
+       if (pool->base.psr != NULL)
+               dmub_psr_destroy(&pool->base.psr);
+
        if (pool->base.dccg != NULL)
                dcn_dccg_destroy(&pool->base.dccg);
 
@@ -1843,9 +1846,15 @@ static bool dcn21_resource_construct(
                goto create_fail;
        }
 
-       // Leave as NULL to not affect current dmcu psr programming sequence
-       // Will be uncommented when functionality is confirmed to be working
-       pool->base.psr = NULL;
+       if (dc->debug.psr_on_dmub) {
+               pool->base.psr = dmub_psr_create(ctx);
+
+               if (pool->base.psr == NULL) {
+                       dm_error("DC: failed to create psr obj!\n");
+                       BREAK_TO_DEBUGGER();
+                       goto create_fail;
+               }
+       }
 
        pool->base.abm = dce_abm_create(ctx,
                        &abm_regs,

diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_gpint_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_gpint_cmd.h
index e13685917dab63b5c5239ee39f51675d593615ec..652d6fc061b6aa8de2401b96e822a21409712b18 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_gpint_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_gpint_cmd.h
@@ -63,6 +63,7 @@ enum dmub_gpint_command {
        DMUB_GPINT__INVALID_COMMAND = 0,
        DMUB_GPINT__GET_FW_VERSION = 1,
        DMUB_GPINT__STOP_FW = 2,
+       DMUB_GPINT__GET_PSR_STATE = 7,
 };
 
 /**